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DFX RTL Design Engineer
DFX RTL design engineer on AMD's Client SOC DFX team, planning and implementing DFX features (JTAG, Scan, Boundary Scan, Debug) and low-power UPF support for next-gen microprocessors using Verilog/SystemVerilog/VHDL and scripting languages.
Lead Software Engineer
Lead a software engineering team to design, build, and maintain scalable systems for a growing company.
Senior Software Engineer (Apps)
As a Senior Software Engineer (Applications), one plans, designs, develops, and tests software systems or applications for enhancements and new products (including cloud-based/internet tools) in a collaborative Agile environment.
Data Engineer III
Contract data engineer processing battery testing data to support algorithm delivery and simulation validation, working with Matlab, C++, and Python in Cupertino.
iRage Capital - QA Engineer
Build and maintain automated test suites for ultra-low-latency trading systems using Python and C++, validating APIs, databases, and end-to-end trading pipelines.
Data Scientist
Data Scientist building an in-house coupled simulation framework for dense plasma focus fusion machines, including radiation models, surrogate models, and data pipelines for shot diagnostics—primarily using Python (NumPy, SciPy, JAX/PyTorch) with C++/Fortran as needed.
Senior Flight Embedded Software Engineer
Senior embedded software engineer focused on flight systems at General Atomics in Huntsville, Alabama.
Senior Embedded Linux Engineer - Connectivity
Build and ship embedded Linux firmware for Verkada’s AI-powered security devices, including gateways, sensors, and mobile trailers, using C/C++/Go and networking protocols.