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Senior Digital Design Engineer, HBM
Design and verify high-speed memory interface logic in Verilog/SystemVerilog, collaborating with teams to close timing, power, and silicon validation for HBM products.
SR. Manager, Design
Leads full-chip functional verification for Micron’s non-volatile memory designs using System Verilog, UVM, and coverage-driven methodology to ensure tape-out readiness.
Chip Design Engineer
Design and verify high-speed networking silicon chips, ensuring low latency and high throughput for NVIDIA's communication devices.
Sr Digital Design Engineer
Design and lead digital architectures for power-management ICs in automotive and industrial systems using Verilog/SystemVerilog, synthesis, and verification flows.
Staff Design Engineer
Staff Subsystem Design Engineer Job Overview Arm’s IP and Technology team in Solutions Engineering department evelop subsystem solutions and SoC IPs for next-generation systems targeting Edge AI, Physical AI and Cloud…
Principal Software Engineer - Compiler Development
Architect and optimize the next-generation SystemVerilog compiler for Xcelium, enabling faster verification of billion-gate AI and hyperscale chip designs using C++ and compiler theory.
Manager Embedded Software Engineer 1
Manage a team of 10–15 embedded software engineers developing real-time communications systems for defense programs like F-22, F-35, and Link16 radios.
FPGA Design Engineer II
Design and verify FPGA hardware using VHDL for radar, RF/EO DSP, and embedded systems; collaborate with systems engineers and verify designs with constrained-random tests.
Sr Principal Real-time Software Engineer
Designs and integrates embedded real-time software for aerospace/defense systems, focusing on firmware-hardware integration, RTOS, and mission-critical avionics with C++ and security constraints.
Principal Engineer - Design
Leads hardware/software co-verification for SoC devices using emulators (e.g., Cadence Palladium) and FPGAs, bridging RTL porting, firmware development, and system-level testing across pre- and post-silicon phases.
Senior Design Verification Engineer
Design and run verification tests for next-gen DRAM and memory chips using SystemVerilog/UVM, debug failures, and automate flows to ensure silicon meets specs.
Principal Photonics IC Design Engineer
Lead the design and delivery of next-gen silicon-photonics integrated circuits for NVIDIA’s AI supercomputers, owning architecture through tapeout and validation.
Senior Electrical Engineer - FPGA Verification
Senior Electrical Engineer verifies FPGA-based radar designs using SystemVerilog/UVM testbenches and industry simulators, ensuring functional correctness and coverage.
Silicon Design Engineer
Lead verification of AMD’s IOHUB subsystem, defining test plans and closing coverage for high-performance interconnect IP used in CPUs, GPUs, and data-center hardware.
FPGA Engineer
About the role: We are seeking a highly skilled FPGA Engineer who is fluent in System Verilog and is an expert user of Xilinx (acquired by AMD) FPGAs. What you'll do: Develop and design FPGA systems using System…
Senior FPGA Prototyping Engineer
Senior FPGA engineer building hardware prototypes and validating next-gen satellite communications ASICs, from FPGA bring-up to first-silicon debug.
Fabric Interconnect Design Verification Engineer
Design verification engineer validating Fabric Interconnect hardware for Microsoft’s cloud infrastructure using UVM, SystemVerilog, and AI-driven tools in Raleigh, NC.
