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Amazon Chip Design Integration Lead
Lead the end-to-end integration of high-performance networking SoCs for AWS Nitro, defining IP blocks, resolving CDC/RDC issues, and driving synthesis/timing closure with Verilog/SystemVerilog and scripting.
Amazon Senior Laboratory Engineer, Machine Learning Hardware
Build and maintain ML hardware lab infrastructure, automate workflows, and support engineering teams with board bring-up, debugging, and equipment management.
System Validation Manager
Sr. System Validation Manager Location: Bengaluru, KA, in Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world,…
Principal Design Verification Engineer
Leads verification strategy for next-gen semiconductor interconnect products, building UVM/SystemVerilog testbenches and driving silicon success for high-speed digital designs.
Senior Principal Platform Architect
Design ultra-high-speed server and switch chassis for AI training clusters, defining backplanes, fabrics, and platform management using standards like UALink, Redfish, and OpenBMC.
Platform Architect
Define the end-to-end hardware, software, and management architecture for next-gen AI scale-up network chassis, including UALink switch fabrics, power/cooling orchestration, and BMC/OpenBMC integration for hyper-scale data centers.
Platform Engineer
Senior Staff Platform Engineer at Qualcomm in Bangalore developing BSP, drivers, and Autosar software for SoC hardware blocks like clocks, power management, and peripherals.
Infrastructure Design Verification Senior Engineer
Designs and verifies high-speed interconnect protocols (PCIe, CXL, AXI) using UVM and SystemVerilog to ensure ASIC/subsystem correctness before tape-out.
SOC Architect
Designs and optimizes System-on-Chip (SoC) architectures for mobile/IoT/XR platforms, focusing on performance, power, and security trade-offs.
Senior PWB Designer
Senior PWB Designer creates high-density circuit boards for mobile, modem, and IoT devices using Mentor Xpedition, PADS, and Cadence Allegro.
Distinguished Technologist, ASIC Design Architect
Architect high-performance ASICs for networking hardware, defining microarchitecture, RTL design, and silicon bring-up while balancing performance, power, and schedule constraints.
Staff Software Quality Assurance Engineer
Designs and runs automated and manual tests for embedded storage software, writes test plans in C/C++, and tracks bugs in JIRA to ensure product quality.
Embedded Software Engineer
Builds embedded firmware in C, Go, and Python for prototype sensors, writing Linux/bare-metal drivers, signal processing, and hardware abstraction layers for resource-constrained ARM devices.
Embedded Software/Driver Development Engineer
Develops Linux kernel drivers and embedded software for hardware subsystems like audio, display, and PCIe, optimizing performance and debugging kernel issues.
Firmware Development Engineer
Develops, debugs, and validates firmware for platform security, power management, memory, or BMC on embedded systems using C, OpenSSL, and hardware debug tools.
Hardware Architect Technologist
Leads architecture and design of next-gen high-performance test platforms, focusing on high-speed digital, signal/power integrity, and system integration for memory validation systems.