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Design Verification Engineer
Verify and validate AMD’s next-gen GPU and SoC designs using SystemVerilog/UVM, emulation platforms, and formal methods to ensure silicon meets performance, power, and functional specs.
Embedded Software Engineer, Physical AI
Develop embedded C/C++ software and Linux platform support for AMD Adaptive SoCs and Ryzen AI Embedded processors, building computer vision, graphics, and edge AI pipelines for robotics and industrial automation.
Senior Staff Software Development Engineer
Senior engineer designing and implementing embedded firmware for AMD’s next-gen networking products, collaborating with silicon, driver, and test teams to deliver high-performance network stacks for cloud and AI systems.
Digital Design Designer
Designs digital IP blocks and SoCs for automotive systems, writing RTL in Verilog/VHDL and collaborating with verification, physical implementation, and validation teams.
Interconnect Design Engineer
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
ASIC RTL Design Engineer
Design and implement synthesizable RTL for complex ASICs using Verilog/SystemVerilog, optimizing for power, performance, and area while collaborating with verification and physical design teams.
Senior/Staff Subsystem & SoC Design Engineer
Designs and verifies GPU and control subsystems for AI-focused SoCs, integrating Arm IP and third-party components for edge, physical, and cloud AI applications.
Director, Embedded Memory
Lead a team to design and deliver embedded memory compilers (SRAM, ROM, register files, DPRAM) across process nodes, setting technical direction and driving PPA optimization while serving as the senior technical voice in customer engagements.
Design Verification Engineer
Design Verification Engineer at AMD responsible for verifying custom hardware accelerators for servers, datacenters, and client/embedded markets using advanced ASIC verification techniques and methodologies like UVM and formal verification.
Design for Test (DFT) Engineer
Design-for-Test (DFT) Engineer builds test access, scan/ATPG/BIST flows, and verifies multi-die silicon packages from RTL to production test.
Lead Firmware Engineer
Lead a global team to design, develop, and deploy embedded firmware for UPS systems using C/C++, RTOS, and control systems, ensuring product quality and alignment with customer needs.
NAND Silicon Design Validation Engineer
Design and validate next-gen NAND Flash memory chips, running Verilog simulations and AI-assisted tools to catch circuit flaws before and after silicon fabrication.
Senior DRAM Security Test Engineer
Develops FPGA-based security test infrastructure to validate DRAM resilience, mitigation effectiveness, and attack surfaces using Verilog/SystemVerilog, Python/C++, and AI-assisted tools like Claude.
Embedded Programming and AI Development Engineer
Develop and validate embedded systems and AI-driven test automation for mobile DRAM products, collaborating with design and manufacturing teams to improve quality and yield.
Staff Design and Verification Engineer
Design and verify next-gen memory chips, from full-chip functional checks to mixed-signal circuits and array architecture, using SystemVerilog, SPICE, and Cadence tools.
Principal RTL Design Engineer
Principal RTL Design Engineer at Micron leads DRAM digital and mixed-signal IP development, owning RTL design from architecture to silicon-ready signoff while optimizing power, performance, and area.
GPU Performance Architect
Architect GPU performance by analyzing bottlenecks in high-end SoCs and GPUs, modeling hardware at multiple abstraction levels, and optimizing for graphics, ML, and automotive workloads.
Senior Firmware Architect, RAS and Power Management
Architect and implement firmware for reliability, availability, serviceability, and power management across NVIDIA’s networking platforms, collaborating with hardware, software, and validation teams.
Early Career - RTL Design Engineer
Design and implement GPU micro-architecture in RTL using Verilog/VHDL, optimizing for power, performance, and area while collaborating with verification and physical design teams.
Lead, Software Engineer
L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers’ mission and quest for professional…