Tech jobs

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Design Verification Engineer

Open 68d RemoteEurope

Romania

Design Verification Engineer builds and runs SystemVerilog/UVM testbenches to verify high-speed SerDes IP for PCIe, Ethernet, and other interfaces, debugging RTL and testbench issues.

Open 23d APACPrincipal Licensed NL sponsor

Sr. Principal Embedded Systems Security Engineer

China

Designs and validates security architectures for NXP’s next-gen SoCs and embedded systems, ensuring protection against cyber and physical attacks in automotive, IoT, and payment applications.

cryptography cybersecurity embedded-systems penetration-testing systemverilog +2 skills

Teledyne

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FPGA Lead/Architect/Implementor

Open 23d EuropeLead

Denmark

Designs and implements ultra-high-speed Ethernet test platforms using cutting-edge FPGAs, focusing on Layer 1–4 protocols and next-gen standards like 1.6Tbps Ethernet.

Open 23d APACPrincipal Licensed NL sponsor

Sr. Principal Digital Designer

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Leads the design and integration of digital subsystems for Automotive Ethernet PHY products, including PCS logic, safety mechanisms, and system-level validation in a semiconductor environment.

Snap

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Integrated Circuit Design Verification Engineer

Open 23d North America

Design verification engineer building and running UVM/SystemVerilog testbenches for AR display ICs using Siemens Questa, plus coverage closure and automation in Linux.

173 000 – 259 000 $

Samsung

Open 22d North AmericaFull-timeStaff

Senior Staff Engineer, GPU Design Verification (Subsystems)

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Senior engineer verifying next-gen mobile GPU subsystems using SystemVerilog/UVM, C++, and constrained-random testing to ensure functional correctness and performance for Samsung’s Xclipse GPU.

180 200 – 247 700 $

Cadence

Open 22d North AmericaPrincipal

Sr Principal Design Engineer

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Lead hardware emulation and FPGA prototyping for semiconductor customers, designing advanced verification solutions for high-speed protocols like PCIe and CXL.

154 000 – 286 000 $

Sapsol Technologies Inc

Open 17d APAC, North America

FPGA Engineer

Designs and verifies FPGA hardware using VHDL/Verilog/SystemVerilog, UVM testbenches, and Xilinx tools, while guiding a remote verification team on DO-254 processes.

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HPR (Hyannis Port Research)

Open 68d North AmericaFull-timeSenior

Senior FPGA Design Engineer

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Designs and optimizes ultra-low-latency FPGA hardware for electronic trading systems used by top-tier financial institutions.

159 300 – 215 000 $

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Senior Principal Engineer SoC Design Location: Pune Time Type: Full time Job Description Summary: We are seeking a highly experienced System-on-Chip (SoC) Designer with 15+ years of expertise to lead architecture and…

Lead Emulation / FPGA Prototyping Engineer

APACFull-timeLead

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Senior Lead Emulation / FPGA Prototyping Engineer Location: Pune Time Type: Full time Job Description Role Summary: We are seeking a skilled and motivated FPGA Prototyping/Emulation Engineer to join our hardware design…

Open 24d HybridNorth AmericaFull-time

Silicon Design Verification Manager

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Manages a team that verifies the correctness of complex silicon designs for Google's hardware platforms using advanced verification methods like SystemVerilog and collaborates with architecture teams.

192 000 – 278 000 $

ASIC Design Verification Manager, Google Cloud

Open 24d North America

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Lead a team to verify Google's TPU (Tensor Processing Unit) silicon designs for AI/ML hardware acceleration, ensuring functional correctness and performance goals through advanced verification strategies and infrastructure development.

192 000 – 278 000 $

Brookhaven National Laboratory

On-siteNorth AmericaContractLead

Digital ASIC Design Engineer

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Senior Digital ASIC Design Engineer Location: Upton, NY Time Type: Full time Job Description The mission of the Instrumentation Division is to develop state-of-the-art instrumentation required for experimental research…

Analog Devices: Mixed-signal and digital signal processing ICs

ai automation fpga prototyping systemverilog +1 skills

Senior Digital Design Engineer

EuropeFull-timeSenior

Senior Engineer, Digital Design Engineering Location: Spain, Valencia, Cortes Valencianas, Italy, Catania, Ireland, Cork Time Type: Full time Job Description About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is…

aumovio

IC Digital Design Engineer

Open 24d APAC

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Designs and verifies digital circuits for FPGA and ASIC implementations, coding HDL modules and collaborating with cross-functional teams to meet performance and reliability targets.

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IP Design Lead, Networking, Google Cloud

Open 24d MENALead

Israel

Leads the design and deployment of networking IP blocks for Google Cloud's custom silicon, using ASIC/SoC methodologies and RTL coding (Verilog/SystemVerilog/VHDL) to deliver high-performance, low-latency hardware solutions.

Design Verification Engineer, Cloud Silicon

Open 24d APAC

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Design Verification Engineer who builds and runs tests to ensure Google’s TPU silicon works flawlessly for AI/ML workloads, using SystemVerilog, UVM, and coverage-driven flows.

AccelerComm