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Software Engineer [Multiple Positions Available]
Build and maintain ETL pipelines and data warehouses for JPMorganChase’s financial systems using Oracle, Informatica, and DevOps tools.
AMAZON ASIA-PACIFIC RESOURCES PRIVATE LIMITED Construction Program Manager (Digital Delivery & Governance)
Oversee BIM and AI-powered digital delivery for AWS data-center construction across APJC, enforcing ISO 19650 standards, managing Procore/BIM 360 workflows, and scaling AI tools like CDMS and ScheduleIQ.
Senior Production Support Analyst – Wealth Management Systems
Role Overview As a Senior Production Support Analyst, you will ensure high availability, operational resilience, and seamless functionality across critical financial platforms, providing high-tier support and driving…
Infrastructure Engineer (IT/Junior/East)
Maintain and upgrade servers, networks, and IT infrastructure; automate tasks with scripting; monitor security and resolve incidents for an HR-focused IT consultancy.
Software Engineer II
Builds and maintains secure payment software in languages like Java and Python, following secure coding standards and CI/CD pipelines for Mastercard’s global financial infrastructure.
DevOps Engineer - SE II
Build and secure Helpshift’s cloud infrastructure, automate CI/CD pipelines, and maintain scalable systems using Kubernetes, Terraform, and Kafka.
GEOINT Sensor Support Engineer (Ramstein AFB, Germany)
Date Posted: 2026-08-11

 Country: United States of America

 Location: US-VA-REMOTE

 Position Role Type: Onsite

 U.S. Citizen, U.S. Person, or…
QA Automation Engineer – GenAI, Storage & System Testing
Build and maintain Python/Perl automation frameworks for GenAI-driven storage and system testing, integrating AI tools into CI/CD pipelines.
DFT Digital Design Engineer (f/m/d)
Design-for-Test engineer implementing scan, MBIST, JTAG, and ATPG flows to improve SoC test coverage and silicon yield while collaborating with cross-functional teams.
Customer Service Representative
The Customer Service Representative (CSR) is responsible for providing quality customer service to internal and external customers daily via telephone, email, web service request, fax, or in-person communication. This…
Customer Service Representative
The Customer Service Representative (CSR) is responsible for providing quality customer service to internal and external customers daily via telephone, email, web service request, fax, or in-person communication. This…
Sr Systems Integration & Test Engineer - Onsite
Senior engineer integrates and tests complex space-based intelligence systems, automating tests in Linux with Python/Perl and collaborating in Agile teams to verify mission-critical ground systems.
Physical Design STA Engineer
Design and optimize physical design, STA, and power integrity flows for high-speed networking chips and SoCs using tools like PrimeTime and PrimePower.
Software Engineer IV
Builds and maintains enterprise healthcare software using Java, SQL, and modern UI frameworks like Angular/React, supporting pharmacy benefits management systems.
Physical Design Engineer
Designs and optimizes semiconductor physical layouts for FPGAs, guiding RTL through GDSII with timing, power, and verification signoff.
Software Engineer (Development & QA Automation) (Hybrid - Newark, NJ, Coppell, TX or NYC)
Build and maintain enterprise applications in Java/Python/Perl while designing and running automated tests with Selenium and Cucumber to ensure code quality before releases.
C004912 Penetration Tester (NS) - MON 24 Aug RELAUNCH
Previously proposed candidates were non-compliant for the following reason: The profiles do not demonstrate clear, independently verifiable experience aligning with the minimum requirement of 3 years in hands-on…
Customer Service Representative
The Customer Service Representative (CSR) is responsible for providing quality customer service to internal and external customers daily via telephone, email, web service request, fax, or in-person communication. This…
Staff Silicon Design Engineer
Design engineer verifies next-gen ASIC and FPGA SoCs using SystemVerilog/UVM, debugging failures and ensuring functional coverage for AMD’s high-performance computing and AI products.
Mask Layout Designer
Designs and verifies advanced SRAM and analog/mixed-signal mask layouts for AMD’s processors, ensuring DRC/LVS compliance and collaborating with global teams to meet tape-out schedules.