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Technical Staff Engineer-Design
Designs low-power wireless System-on-Chip solutions, writing RTL code and guiding the SoC through synthesis, timing analysis, and tape-out while collaborating with global teams.
Enterprise Hardware Engineering Technical Lead
Lead hardware board design and system engineering for Cisco’s Edge and Access routing products, shepherding designs from concept through production and validation.
Principal Physical Design/Implementation Engineer
Lead physical design and implementation for complex semiconductor subsystems, driving RTL-to-GDSII flows, floorplanning, place-and-route, and timing closure for high-performance SoCs.
DFT Design Engineer
Designs and validates chip-level test structures (JTAG, MBIST, scan/ATPG) to ensure silicon quality and manufacturability, collaborating with design and verification teams.
Senior Principal Electrical Engineer-FPGA Design - Onsite Tucson, AZ
Lead FPGA design and architecture for defense electronics using VHDL, targeting Xilinx/Altera/Microsemi devices, and verify with constrained-random testing.
R&D Engineer IC Design
Designs and validates high-speed optical communication chips, writing RTL, running simulations, and debugging silicon to meet power and performance targets.
ASIC Design Engineer
Designs and implements ASIC/SoC RTL (Verilog/SystemVerilog) for high-performance SSD controllers, collaborating with verification, validation, and firmware teams to deliver next-gen enterprise and AI data center storage solutions.
Embedded Firmware Engineering Manager
Lead a small team to design, develop, and optimize firmware for high-performance motion control systems used in robotics, automation, and aerospace.
CPU Core Design Verification Engineer
Design verification engineer at AMD, building and running tests to validate next-generation x86 CPU cores using C++, Verilog, and SystemVerilog.
Senior FPGA Engineer I
Designs and verifies FPGA circuits for satellite and aerospace communication systems, using HDL tools and high-speed interfaces, while collaborating with hardware teams and customers.
Staff Firmware/Middleware Engineer
Designs and defines firmware architecture for digital power management products in AI, datacenter, and high-performance computing, bridging hardware capabilities with embedded firmware systems.
Hardware Engineer (FPGA/ASIC)
Interns collaborate with full-time engineers on FPGA/ASIC hardware projects using OCaml and Hardcaml, from design to validation, with mentorship and exposure to Jane Street’s internal tools.
Applied AI Engineer, Top Hardware Priorities
Build AI tools that speed up AMD’s hardware and software engineering workflows, such as design optimization, verification, and debugging, by turning manual processes into AI-assisted systems.
Разработчик FPGA (ПЛИС)
FPGA engineer designs, implements, and verifies real-time radio signal processing hardware using Verilog/SystemVerilog and Xilinx tools, with a focus on digital signal processing algorithms.
Senior Software Engineer, Hardware Tools and Methodology Development
Designs and improves C++ tools and automated workflows for generating and verifying Verilog RTL used in NVIDIA's hardware products.
Software Development Engineer
Software Development Engineer Location: Bengaluru, India We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from…
Analog Design Engineer
Analog Design, Sr Staff Engineer - 17402 Location: Mississauga, Mississauga, Canada We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered…