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FPGA Hardware Engineer
Design and implement FPGA logic for next-gen routers, write Verilog/SystemVerilog RTL, run simulations, and validate hardware with cross-functional teams.
Principal Engineer - Analog Design
Designs and validates analog and mixed-signal IP blocks for FPGA products, collaborating with architects and engineers to ensure high-quality, low-power solutions.
Principal Engineer - Hardware Sustaining
Principal Engineer leads hardware failure analysis and corrective actions for HPE networking products, diagnosing complex issues in components like ASICs, power, and high-speed signals.
ASIC Design Engineer Technical Lead
Lead the design and implementation of ASIC chips for Cisco’s networking hardware, using Verilog/SystemVerilog and collaborating across teams to deliver silicon from spec to tape-out.
Mixed Signal Logic Design Engineer
Job Details: Job Description: The Memory PHY Group (MPG) within the Central Engineering Group (CEG) is looking for an energetic and passionate Logic Design Engineer who will work on high-speed digital design targeted…
FPGA Lead/Architect/Implementor
Designs and implements ultra-high-speed Ethernet test platforms using cutting-edge FPGAs, focusing on Layer 1–4 protocols and next-gen standards like 1.6Tbps Ethernet.
System Software Engineer - Performance Verification Infrastructure
Build and maintain GPU performance verification infrastructure, automating workflows and data pipelines to validate next-generation GPU architectures from simulation to silicon.
Staff Engineer - HBM Analog Design
Designs and validates advanced analog mixed-signal circuits for next-gen High Bandwidth Memory (HBM) chips, including amplifiers, bandgap references, and IO circuits, using SPICE simulators and layout tools.
Integrated Circuit Design Verification Engineer
Design verification engineer building and running UVM/SystemVerilog testbenches for AR display ICs using Siemens Questa, plus coverage closure and automation in Linux.
Senior Principal DFT Design Engineer
Designs and debugs test logic for ASIC/SoC chips, inserting scan chains and MBIST, and generating ATPG patterns to ensure manufacturability and high fault coverage.
Sr Principal Design Engineer
Lead hardware emulation and FPGA prototyping for semiconductor customers, designing advanced verification solutions for high-speed protocols like PCIe and CXL.
Senior ASIC/FPGA Design Engineer
Design and verify ASIC/FPGA hardware for defense systems, writing RTL, running simulations, and integrating modules in a lab using Xilinx/Altera tools and scripting.
ESD & CAD Design Manager
Manage CAD flow development and ESD design methodology, integrating ESD protection into electronic designs and leading teams to ensure compliance and efficiency using tools like Cadence Virtuoso and Synopsys Primetime.
FPGA Engineer
Designs and verifies FPGA hardware using VHDL/Verilog/SystemVerilog, UVM testbenches, and Xilinx tools, while guiding a remote verification team on DO-254 processes.
Principal Engineer SoC Design
Senior Principal Engineer SoC Design Location: Pune Time Type: Full time Job Description Summary: We are seeking a highly experienced System-on-Chip (SoC) Designer with 15+ years of expertise to lead architecture and…
Lead Emulation / FPGA Prototyping Engineer
Senior Lead Emulation / FPGA Prototyping Engineer Location: Pune Time Type: Full time Job Description Role Summary: We are seeking a skilled and motivated FPGA Prototyping/Emulation Engineer to join our hardware design…
Silicon Design Verification Manager
Manages a team that verifies the correctness of complex silicon designs for Google's hardware platforms using advanced verification methods like SystemVerilog and collaborates with architecture teams.