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Testsite Automation Layout Designer
Lead the design and automation of RF, analog, and mixed-signal test-site layouts for next-gen semiconductor processes using Cadence Virtuoso and SKILL scripting.
Analog Design Engineer- eInfochips
Designs high-performance analog/mixed-signal circuits (PLLs, ADCs/DACs, RFIC) using Cadence Virtuoso, Spectre, and Mentor Calibre, with multi-node process experience from 28nm to 7nm.
Design Engineer -Memory Layout
Job Overview: This opening is for a memory layout designer in our PHYSICAL IP – MEMORY group in Noida. We work on innovative memory architectures in pioneering technology nodes to enable the best Arm Systems in all the…
Senior Principal RF Design Engineer
Designs high-frequency RF ICs (30 GHz+) for 5G/6G, radar, and sensors using advanced EDA tools and process nodes.
IO and Mixed Signal Layout Design Engineer
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IO and Mixed Signal Layout Design Engineer
Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before…
Senior Circuit Design Engineer, Power Modeling and Simulation (Remote)
Senior Circuit Design Engineer - Power Modeling and Simulation Location: US, CA, Santa Clara, US, CA, Remote Time Type: Full time Job Description NVIDIA has been at the forefront of technological innovation for over…
Staff Analog Design Engineer
Staff Analog Design Engineer (AMS) Location: US, MA, Wilmington Time Type: Full time Job Description About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical…
Staff Analog Design Engineer
Staff Analog Design Engineer Location: Germany, Munich, Seidlstr Time Type: Full time Job Description About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical…
Memory Design Engineer
Designs ultra-low-power embedded memory (SRAM/Register File) circuits and compilers for AI edge chips, optimizing for area, speed, and sub-threshold operation while collaborating with foundries and validation teams.
ESD & CAD Design Manager
ESD & CAD Design Manager Location: USA-AZ-Chandler-North Juniper Drive Time Type: Full time Job Description Please Note: 1. If you are a first time user, please create your candidate login account before you apply…
IC Design Exploration Intern
An intern in AMD’s Singapore design center works on cutting-edge IC design tasks like analog/digital design, verification, or post-silicon validation using EDA tools such as Cadence and Synopsys, contributing to high-speed SerDes and AI-related chips.
Principal RFIC Design Engineer
Principal RFIC Design Engineer - TeraWave Location: Bay Area, CA, Central Texas, Greater Seattle Area, San Diego, CA Time Type: Full time Job Description Application close date: Applications will be accepted on an…
Senior Analog/RF System Architect
Senior High-Speed Analog/RF System Architect (f/m/d) Department: Product Team Location: Aachen, Germany Employment Type: FullTime About us We see the semiconductor industry as a realm of possibility. We see…
Analog Transceiver Design Engineer
Analog Transceiver Design Engineer (f/m/d) Department: Product Team Location: Aachen, Germany Employment Type: FullTime About us We see the semiconductor industry as a realm of possibility. We see opportunity. We see…
Analog/Mixed-Signal Design Engineer
Analog/Mixed-Signal Design Engineer (f/m/d) Department: Product Team Location: Aachen, Germany Employment Type: FullTime About us We see the semiconductor industry as a realm of possibility. We see opportunity. We see…
Sr High Speed Mixed Signal Circuit Design Eng
Designs and brings to production high-speed analog/mixed-signal circuits (ADCs, DACs, PLLs, SERDES) in advanced CMOS FinFET for optical networking hardware at Nokia’s Optical Networks division.