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ML ASIC Design Engineer
Designs high-performance ML ASICs for autonomous driving, translating requirements into hardware features and optimizing power, area, and performance.
ASIC Design Engineers to our R&D site in Stockholm
Design and verify ASIC hardware modules for Axis’s ARTPEC SoC chips, using HDLs and EDA tools to accelerate surveillance-camera functions in a collaborative R&D team.
Principal FPGA Engineer
Designs and optimizes high-performance DSP and communications systems on FPGA hardware using VHDL/Verilog, focusing on parallelized algorithms and fixed-point arithmetic.
Senior Electrical / Hardware Engineer
Senior Electrical/Hardware Engineer modernizes avionics hardware for aerospace and defense programs, tackling obsolete components and FPGA-based replacements while ensuring DO-254/160 compliance.
Silicon Design Engineer 2 - Multi subsystem verification
Design engineer builds and verifies multi-subsystem IP for AMD’s high-performance interconnects (PCIe, IOHUB, CIT, DACC) using SystemVerilog/UVM and scripting.
Senior FPGA Design Engineer
Designs and implements FPGA-based prototypes for ASIC validation using Verilog, high-speed interfaces, and Quartus Prime Pro, collaborating with cross-functional teams to optimize timing and debug hardware.
ASIC Design Engineers to our R&D site in Stockholm
Design and develop ASIC hardware for Axis’s ARTPEC SoC chips, focusing on digital logic, HDLs (SystemVerilog), and EDA tools to power surveillance cameras.
SrvDigital Design Engineer
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…
Sr Digital Design Engineer
Senior engineer designing and optimizing RTL for DRAM digital and mixed-signal blocks, collaborating across teams to meet PPA targets using Verilog/SystemVerilog and synthesis/STA flows.
ASIC/FPGA Mid-Level Manager - Design & Verification
Manage a team designing and verifying ASIC/FPGA chips for aerospace and defense programs, ensuring first-pass quality and on-time delivery while mentoring engineers.
Asic RTL Design Engineer
Design and implement synthesizable RTL for complex ASIC/SoC using Verilog/SystemVerilog, focusing on Lint, CDC, and SoC integration while collaborating with cross-functional teams.
Principal Design Verification Engineer, HBM
Lead verification of high-bandwidth memory (HBM) and DRAM designs using SystemVerilog/UVM, ensuring functional correctness and performance for Micron’s memory products.
IC Design Engineer
Designs and implements RTL code and micro-architectures for digital IPs and SoCs in the automotive domain, following the full ASIC flow.
Principal ASIC Design Engineer
Lead the design of next-gen ASIC IP for AI-driven data movement, collaborating across teams to deliver high-performance, secure, and power-efficient silicon solutions for AMD’s server, data center, and embedded products.
GPU RTL Design Engineer
Designs and implements GPU hardware in Verilog/SystemVerilog, optimizing for performance, power, and area while collaborating with verification teams.
Design Verification Engineer - Fully Remote | Upto $175/hr
Design Verification Engineer builds and verifies RTL components in Verilog/SystemVerilog to improve AI model training and evaluation workflows, using UVM and LLM-based tools.
FPGA Engineer
Designs, verifies, and tests FPGA-based RTL for satellite systems, collaborating with hardware, software, and DSP teams to meet performance and radiation-mitigation requirements.