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Mid Level ASIC Design Engineer
Design and implement a high-performance, low-power ASIC accelerator for AI inference in autonomous-driving perception modules using Verilog, SoC IP integration, and timing/power optimization.
Digital Design Engineer Intern
Fall 2026 Internship - August 24 - December 11 Must be currently enrolled full time in a university degree program pursing a bachelors or masters degree. Must not have graduated before September 2026 and not after May…
Senior Electrical Engineer - Sensor FPGA and PCB (Aggregator)
Apptronik is a human-centered robotics company developing AI-powered robots to support humanity in every facet of life. Our flagship humanoid robot, Apollo, is built to collaborate thoughtfully with people, starting…
Staff Electrical Engineer - Sensor FPGA and PCB (Aggregator)
Apptronik is a human-centered robotics company developing AI-powered robots to support humanity in every facet of life. Our flagship humanoid robot, Apollo, is built to collaborate thoughtfully with people, starting…
Senior Mixed Signal / Memory Circuit Designer
We are looking for a Senior Mixed Signal / Memory Circuit Designer to help design and verify complete NVM IP macros for Mythic's product architecture using foundry NVM technologies. What you'll do Participate…
SoC Audio Architect, Platform Architecture
Do you love crafting elegant solutions to the hardest problems in audio and acoustics? Are you a big-picture, forward-thinking engineer who understands how audio subsystems integrate into a SoC and a system? At Apple,…
Design Verification Engineer - DDR Memory Subsystem
Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering ( SCHIE ) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission.…
Design Verification Engineer
Design Verification Engineer at Microsoft responsible for verifying components in cloud hardware, developing verification environments, and improving quality using UVM, formal methods, and generative AI.
Design Verification Engineer, Intern
Intern verifying RISC-V and AI accelerator SoCs using SystemVerilog, UVM, and Python to ensure functional correctness and robustness.
Design Verification Engineer
Design Verification Engineer builds and runs testbenches to verify custom silicon components for Microsoft’s cloud infrastructure using SystemVerilog, UVM, and scripting.
Senior Silicon Digital Design Engineer, Core IP
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions…
Senior Electrical Engineer - Sensor FPGA and PCB (Aggregator)
Design and build electronics for Apollo's sensor bridge using FPGA hardware and PCB design. Involves schematic capture, RTL development in VHDL/Verilog, and high-speed digital interface validation.
Graduate FPGA Engineer (2027 Start)
Designs high-speed hardware solutions (FPGAs) for ultra-low-latency trading systems, collaborating with traders and engineers to optimize network infrastructure and algorithmic trading components using VHDL/Verilog.
FPGA Internship (2027 Start)
FPGA Internship where the intern builds latency-critical hardware systems for trading, working on parallel algorithms, networking interfaces, and FPGA applications using VHDL/Verilog/SystemVerilog.
FPGA Developer
Leads an FPGA team to design and deploy readout systems for neutron detectors using VHDL/Verilog, simulation, and hardware debugging.
Staff Engineer, RTL Design AI Hardware
Designs and optimizes high-performance RTL for AI hardware, focusing on micro-architectures, power efficiency, and performance in a hybrid Belgrade office.
Low Power Design Engineer (RTL)
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And…
Irage Capital- FPGA Lead
Lead the design and implementation of ultra-low-latency FPGA pipelines for market data and order execution in a high-frequency trading firm, using Verilog/SystemVerilog and Xilinx toolchains.