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Hardware Design Engineer - Level 3
Designs and tests integrated circuits, ASICs, and FPGAs for signal processing; reverse-engineers hardware/firmware using VHDL, Xilinx tools, and Linux.
RF Test Engineer II
Designs and runs RF test plans for spacecraft telemetry systems, validating flight hardware from lab benches to mission-ready status using spectrum/network analyzers and automation scripts.
Electrical Hardware Engineer
Design analog/digital circuits and verify hardware for automotive aftermarket products, managing changes and obsolescence.
Staff Firmware Test Developer
Develop and execute firmware verification plans for NVMe and SSD protocols using Python, C/C++, and JavaScript; automate tests and analyze failures to improve SSD firmware quality.
Peripherals Design Verification Engineer
Designs and verifies peripheral IP blocks (PCIe, CXL, USB, Ethernet) using SystemVerilog/UVM, coverage-driven random testing, and C-based reference models.
Computer Vision Engineer
Develop and optimize computer vision and video processing algorithms for Qualcomm’s Snapdragon-powered devices, mapping them to hardware accelerators and deploying on-device.
Sr. PCB Designer (Starlink)
Designs and routes complex PCBs for Starlink hardware, partnering with engineers to optimize layouts for RF, power, and digital circuits using tools like Mentor Xpedition or Altium.
Staff Design Verification Engineer
Design verification engineer building UVM testbenches for high-speed interconnects (PCIe, CXL, AXI) to ensure ASIC/subsystem correctness before tape-out.
Infrastructure Design Verification Staff Engineer
Designs and verifies hardware infrastructure, focusing on DDR subsystem verification for Qualcomm’s next-gen products. Uses UVM, SystemVerilog, and debug tools to create test plans, integrate verification IP, and ensure high-quality verification of digital/analog/RF systems.
Video Codec Design Engineer
Video Codec Design Engineer, up to Staff Location: Taipei, Taipei City, Taiwan Department: ASICS Engineering Work Location: onsite Company: Qualcomm Semiconductor Limited Job Area: Engineering Group, Engineering Group…
CPU Physical Design Engineer
Designs and optimizes CPU physical layouts using Place & Route tools (FC/Innovus), STA (Primetime/Tempus), and UPF/CPF for low-power, high-speed ASICs.
Senior RTL Design Engineer, DDR
Designs and validates RTL for DDR memory interfaces and low-power SoCs, ensuring timing closure and compliance with AHB/AXI protocols.
Avionics Hardware Engineer
Design and verify FPGA/electronic hardware for avionics systems using VHDL/Verilog, schematics, and lab testing; collaborate on safety-critical projects.
Emulation Hardware Engineer, Google Cloud
Develop and maintain emulation models and infrastructure for Google’s custom silicon, scripting automation and debugging hardware flows to accelerate product development.
Software Engineering Manager
At CoMind, we are developing a non-invasive neuromonitoring technology that will result in a new era of clinical brain monitoring. In joining us, you will be helping to create cutting-edge technologies that will…
Digital Design/FPGA Engineer
Designs and debugs FPGA prototypes by converting ASIC RTL to FPGA, writes test benches, and develops hardware companion boards.