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Sr. Silicon Design Engineer
Design and verify next-gen ASIC/SOC components for AMD’s processors using Verilog/VHDL, SystemVerilog, UVM, and PCIe/AXI protocols.
Silicon Design Engineer
Design and verify ASIC components for next-gen processors using RTL, Verilog/VHDL, and EDA tools while optimizing CPU architecture and memory management.
MTS Silicon Design Engineer
Design and verify next-gen CPU/GPU/SoC silicon, writing Verilog/SystemVerilog tests and collaborating with RTL teams to debug pre-silicon issues.
Sr. Silicon Design Engineer
Design and verify next-gen semiconductor components for AMD’s processors, focusing on ASIC, GPU, and SOC architecture using Verilog/VHDL, RTL, and EDA tools.
Silicon Design Engineer
Design and verify ASIC components for next-gen processors using Verilog/System Verilog and RTL coding in a Linux environment.
Sr. Silicon Design Engineer
Design and verify next-gen semiconductor components and ASICs using Verilog/VHDL, CMOS, and EDA tools in a Linux environment.
Sr. Silicon Design Engineer
Design and verify next-gen semiconductor chips using Verilog, SystemVerilog, VHDL, and EDA tools; develop hardware verification flows and write Python/C++/Shell scripts.
MTS Silicon Design Engineer
Designs and verifies next-gen CPU hardware using C++, Verilog, and UVM; runs simulations and formal checks to catch bugs before silicon tape-out.
Silicon Design Engineer
Design and verify next-gen CPU/GPU/SoC components using Verilog/SystemVerilog/VHDL, C/C++, and Python in Linux environments.
Sr. Silicon Design Engineer
Design and verify next-gen CPU/GPU/APU silicon, writing Verilog/SystemVerilog/VHDL and C/C++/Python to architect and simulate complex ASICs for AMD’s processors.
Sr. Silicon Design Engineer
Design and verify next-gen semiconductor chips using C/C++/Python and HDLs like Verilog/SystemVerilog; drive ASIC flows from RTL to synthesis, place-and-route, timing, and power analysis.
Sr. Silicon Design Engineer
Design and verify next-gen CPU/GPU/SoC components using Verilog/SystemVerilog/VHDL and C/C++/Python for AMD’s semiconductor products.
Silicon Design Engineer
Design and verify ASICs and SoCs for next-gen processors, using Verilog/VHDL, RTL coding, and EDA tools in a Linux environment.
MTS Silicon Design Engineer
Design and verify next-gen CPU silicon, using Verilog/SystemVerilog/VHDL and C/C++/Python in Linux/Unix environments to drive ASIC synthesis, timing, and validation.
Sr. Silicon Design Engineer
Design and verify next-gen CPU/GPU/SoC silicon at AMD, using Verilog/SystemVerilog/VHDL, C/C++, and Python to ensure correct functionality and performance of complex ASICs.
MTS Silicon Design Engineer
Design and verify next-gen semiconductor chips using Verilog/VHDL, UVM, and SystemVerilog test benches in a Linux environment.
Systems Design Engineer
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And…
Sr. Silicon Design Engineer
Design and verify next-gen processor IP blocks using Verilog/VHDL, C++, and Python; debug RTL, timing, and coverage issues; collaborate with SoC and verification teams.