Tech jobs

Open 65d APAC H-1B sponsor history

Director, Physical Design

India

Leads a team in Hyderabad to design and implement high-speed connectivity ASICs for AI infrastructure, using advanced EDA tools and flows for full-chip physical design and tapeout.

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Open 55d APAC H-1B sponsor history

IP Design Director

India

Designs high-performance digital IP for AI connectivity chips, focusing on RTL, synthesis, and integration of processor and peripheral IPs at advanced semiconductor nodes.

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Open 55d APAC H-1B sponsor history

SoC Design Director

India

Leads SoC design for high-performance connectivity chips, owning RTL, synthesis, timing closure, and pre/post-silicon debug at advanced process nodes using Synopsys/Cadence tools.

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Open 32d On-siteNorth AmericaPrincipal H-1B sponsor history

Principal Physical Design Engineer, Methodology

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Principal Physical Design Engineer defines and maintains reusable RTL-to-GDSII flows and automation for SoC tapeouts, integrating Cadence and Synopsys tools to optimize PPA and schedule predictability.

185 000 – 240 000 $

Cadence Design Systems

Open 15d APACFull-timePrincipal

Principal Design Engineer

China

Sr Principal Design Engineer Location: SHANGHAI Time Type: Full time Job Description At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Responsibilities:…

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Ambiq Micro, Inc.

Open 68d North AmericaStaff

Sr. Staff Engineer - Digital Design Verification

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Senior engineer who designs and runs verification tests for low-power System-on-Chip designs used in IoT and edge-AI products, using SystemVerilog, UVM, and C/C++.

180 000 – 250 000 $

Ambiq Micro, Inc.

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Staff Engineer - Design Verification

Open 53d APACStaff

Singapore

Design verification engineer at Ambiq Micro, Singapore, responsible for verifying low-power SoCs for IoT applications using SystemVerilog/UVM, ARM/RISC-V, and power-aware methodologies.

Ambiq Micro, Inc.

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Memory Design Engineer

Open 37d APAC

Singapore

Designs ultra-low-power embedded memory (SRAM/Register File) circuits and compilers for AI edge chips, optimizing for area, speed, and sub-threshold operation while collaborating with foundries and validation teams.

UKG

Open 23d HybridNorth AmericaStaff

Sr. Staff Software Engineer- Cloud

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Build and maintain UKG’s cloud PaaS layer, abstracting infrastructure complexities for app teams using Go, Kubernetes, GCP, Ansible, and CI/CD pipelines.

145 600 – 209 000 $

Okta

Open 58d North America H-1B sponsor history

Technical Architect

Secure Every Identity, from AI to Human Identity is the key to unlocking the potential of AI. Okta secures AI by building the trusted, neutral infrastructure that enables organizations to safely embrace this new era.…

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200 000 – 308 000 $

KPN

Open 23d HybridEurope, North AmericaContract

Cyber Security Specialist - KPN-CERT

Monitor and respond to security threats for KPN’s critical services, performing incident analysis, threat hunting, and digital forensics across multi-cloud, mobile core, and on-premise environments.

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5 190 – 7 803 € / mo

Google

Open 23d North AmericaLead

Physical Design Lead, ASIC

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Lead physical design of Google’s TPU silicon, shepherding custom datapaths from RTL to GDSII while optimizing power, performance, and area for AI/ML workloads.

192 000 – 278 000 $

Advanced Micro Devices, Inc

AI/ML Silicon Verification Solutions Engineer – Tools

Open 23d North America

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Build AI-powered tools to automate and enhance semiconductor verification workflows, using Python, LLMs, and cloud DevOps for faster, smarter hardware development.

Apple

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Early Career Analog Mixed-Signal Design Verification Engineer (m/f/d)

Open 23d Europe

Germany

Verify next-gen power-management ICs for Apple’s PMU team, writing test plans and environments in SystemVerilog/Verilog-AMS to ensure high-quality silicon tape-outs.

Etched.ai

Open 15d HybridNorth AmericaFull-time

Physical Design Engineer, Block Level, Subsystem Implementation

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Physical Design Engineer - Block Level, Subsystem Implementation Department: ASIC Location: Austin Compensation: $200K – $300K • Plus Significant Equity Employment Type: FullTime About Etched Etched is building…

Intercontinental Exchange Holdings, Inc.

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Senior Database Developer

Senior

Job Description Job Purpose The candidate should be able to work independently, handle multiple simultaneous tasks and be adept at prioritizing their work. The candidate will be able to focus on the project priorities…

Advanced Micro Devices, Inc

Open 26d APACInternshipIntern

IC Design Exploration Intern

Singapore

An intern in AMD’s Singapore design center works on cutting-edge IC design tasks like analog/digital design, verification, or post-silicon validation using EDA tools such as Cadence and Synopsys, contributing to high-speed SerDes and AI-related chips.

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bah

Open 15d North AmericaPart-time

Front End Developer

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Front End Developer Location: McLean, VA, Fort Belvoir, VA Time Type: Full time Job Description Front End Developer The Opportunity: As a full stack develop er, you can resolve a problem with a complete end-to-end…

bah