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Software Engineer III (Python, C#, AWS, Snowflake/Databricks and/or Go)
Build and optimize data pipelines for vectorized financial data in Snowflake and Databricks, using Go, Python, and SQL to support AI-driven analytics and retrieval.
Senior Engineer I Design
Design-for-Test engineer responsible for inserting boundary scan, memory BIST, and scan logic into complex SoCs, running ATPG, and debugging silicon bring-up on ATE.
Yield Analytics Engineer
Analyzes semiconductor manufacturing data using SQL, Python, and statistics to improve yield and quality in a high-volume production environment.
Graduate Talent (CPU Design Verification)
Verifies CPU logic before manufacturing by writing test benches in SystemVerilog/UVM, running simulations, debugging failures, and collaborating with architects to meet specs.
Memory Layout Design Engineer
This is a hybrid role with four days per week at Cisco’s Yerevan office. Meet the Team Our team is at the forefront of innovation, specializing in memory layout implementation for the Cisco Silicon One platform that…
R&D Engineer IC Design
Designs and validates advanced memory components (SRAM, ROM, TCAM) for cutting-edge semiconductor processes, using transistor-level simulation and scripting tools.
Senior ASIC Design Engineer
Design and verify ASICs for HP printers, leading RTL coding, verification, and silicon validation while collaborating with cross-functional teams to deliver embedded solutions.
Senior ASIC Design Engineer
Design and verify ASICs for HP printers, leading RTL coding, verification, and silicon validation while collaborating with cross-functional teams to deliver embedded solutions.
Full-Chip Senior Principal Physical Design Engineer
Lead the physical design and implementation of high-performance processor chips from RTL to GDS in advanced nodes (5nm–2nm), managing global teams and sign-offs for timing, power, and DFM.
Full-Chip Principal Physical Design Engineer
Lead the physical design and methodology for next-gen high-performance processor chips, managing RTL-to-GDS flows, timing, power, and sign-offs in advanced nodes (5nm–2nm) for server, 5G/6G, and networking applications.
IP Physical Design Engineer
Designs and optimizes high-performance processor chips from RTL to GDSII, leading physical design flows and automation for server, 5G/6G, and networking applications.
Amazon Security Engineer, Correlation and Response, AWS Security Hub
Designs and implements threat detection, correlation, and response rules for AWS Security Hub to assess and mitigate risks across cloud environments using Python, AWS tools, and emerging AI techniques.
Senior Staff Engineer, Physical Design (Floorplanning)
Senior engineer leading physical design and floorplanning for high-performance GPUs and SoCs at advanced technology nodes, optimizing power, performance, and area while mentoring peers and driving EDA/tool innovation.
Lead Site Reliability Engineer, Vice President
Lead a team to design, deploy, and maintain highly reliable financial systems for Morgan Stanley’s Wealth Management division, focusing on automation, monitoring, and incident response using Linux, scripting, and cloud platforms.
Senior PCIe Design Engineer
Designs and integrates PCIe, CXL, and other I/O subsystems for ARM-based SoCs, writing RTL, debugging, and collaborating with verification and backend teams.
Staff PCIe Design Engineer
Designs and integrates PCIe, CXL, and other I/O subsystems for ARM-based SoCs, writing RTL, debugging, and collaborating with verification and backend teams.
Data Scientist
Data Scientist analyzes DHS data to support audits and investigations, using Python/R, Excel, and BI tools to clean, visualize, and extract insights for decision-making.
Amazon Security Engineer II - AMZ9802161
Security Engineer at AWS provides frontline support for security issues, conducts penetration testing, and develops policies to protect customer-facing services and data.