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Digital ASIC Design Engineer
Designs and optimizes digital ASICs for next-gen semiconductor systems, handling RTL coding, synthesis, timing analysis, and validation in a high-tech Swiss engineering environment.
Senior FPGA Engineer
Senior FPGA Engineer at Castelion building high-performance digital systems for defense hardware using Vitis HLS, C/C++, and Xilinx/AMD FPGAs.
HITL Test Infrastructure Engineer
Build and own Hardware-in-the-Loop test infrastructure for embedded flight-critical systems, automating hardware reservation, firmware flashing, and CI/CD validation across microcontrollers, FPGAs, and GPUs.
HWIL FPGA Engineer
Design and implement FPGA-based real-time Hardware-in-the-Loop systems for defense-grade hardware validation, integrating high-fidelity simulations with physical sensors and avionics.
FPGA Developer
Design and verify low-latency FPGA logic in Verilog/SystemVerilog for high-frequency trading systems, using AI tools to accelerate development and debugging.
Senior FPGA Design and Verification Engineer
Design and verify FPGA-based hardware for Dolby’s cinema servers, audio processors, and HDR projection systems using VHDL/Verilog/SystemVerilog and coverage-driven verification.
Senior IC&E Reactor Protection System Design Engineer
Company Overview Kairos Power is a new nuclear energy technology and engineering company whose mission is to enable the world’s transition to clean energy, with the ultimate goal to dramatically improve people’s…
IP Firmware Design Engineer
Design and verify firmware for calibrating high-speed DDR/LPDDR memory interfaces on FPGAs, integrating with Quartus Prime and collaborating across hardware/software teams.
Lead, Software Engineer (Advanced Sonar Systems)
Lead a team developing advanced sonar systems for defense applications, focusing on real-time signal processing and embedded software.
Graphics RTL Design Engineer
Designs power-efficient, high-performance GPU microarchitectures for Apple’s mobile and desktop devices using SystemVerilog and collaborates with cross-functional teams.
Display Silicon Architect
Design, architect, develop, and launch next-generation display technologies in Apple products. The Display team develops cutting-edge display solutions and technologies that are central to Apple’s products. The key…
Senior RTL Digital Design Engineer - SoC for Data Centers
Designs and verifies RTL logic for mixed-signal SoCs in data-center applications using Verilog/SystemVerilog.
Principal Silicon Design Verification Engineer
Design verification engineer validating PCIe IP using UVM/C testbenches and Verilog/SystemVerilog to ensure silicon reliability for Microsoft’s cloud infrastructure.
Silicon Design Engineer
Design and verify ASIC and semiconductor components for AMD’s next-gen processors, using Verilog/VHDL, EDA tools, and Unix/Linux workflows.
Analog Designer
Designs and tests high-speed analog and mixed-signal circuits (GDDR, PLLs, SerDes) for next-gen AMD processors using Verilog, C++, and Cadence tools.
Sr. Silicon Design Engineer
Design and verify next-gen GPU/CPU/SoC silicon, writing RTL in Verilog/SystemVerilog/VHDL and using ASIC tools to optimize power, timing, and area for AMD processors.
MTS Silicon Design Engineer
Design and verify ASICs and SoCs for next-gen processors using Verilog, VHDL, and UVM testbenches in a distributed compute environment.
Sr. Silicon Design Engineer
Design and verify next-gen ASICs and SoCs for AMD/Xilinx chips using RTL, Verilog/SystemVerilog/VHDL, and C/C++/Python in Linux environments.