American multinational semiconductor company
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AMD is hiring an MTS Software Development Engineer in Santa Clara to architect and drive its AI software stack (ROCm) — optimizing performance from GPU kernels to large-scale distributed multi-GPU systems, and using LLM/agent-based tooling to accelerate development for demanding workloads like foundation models and autonomous AI agents.
Senior (SMTS) software development engineer at AMD designing, developing, and debugging operating-systems-level software, compilers, and network/cloud tools supporting semiconductor operations. Day-to-day work spans systems-level and platform reliability engineering using C++/Python/Java/Go, Kubernetes GPU clusters, Prometheus/Grafana/Elasticsearch monitoring, CI/CD pipelines, and Terraform.
AMD is hiring a Sr. Silicon Design Engineer in Orlando, FL to research, design, verify, and document ASICs — covering architecture and logic design, simulation, RTL-to-emulation flows, and SoC bring-up. Core tech: SystemVerilog, front-end EDA tools, C/C++, TCL, Python, Unix/Linux, and Git.
AMD is hiring Software Development Engineers in Austin, TX to research, design, develop, and test systems-level software, compilers, and OS/graphics software for its semiconductor products, including debugging, bring-up, and performance tuning of new graphics hardware. Core stack: C/C++/Python, CUDA, GPU programming, ML/LLMs, and Linux/Unix.
AMD is hiring a Software Development Engineer in Austin, TX to research, design, develop, and test operating systems-level software, compilers, and firmware for semiconductor operations. Day-to-day work involves debugging, verifying, and validating systems-level software and low-level device drivers using C/C++ and Python.
AMD is hiring Software Development Engineers in Austin, TX to research, design, develop, and test operating systems-level software, compilers, and related tools for semiconductor operations. The role centers on systems-level development and debugging in C, C++, or Python across Unix/Linux environments, with exposure to machine learning.
Senior engineer developing high-performance collective communication libraries (RCCL), GPU communication runtimes, and benchmarking tools for AI/HPC workloads on AMD Instinct GPUs. Day to day: C/C++/Python and CUDA work tuning multi-GPU/multi-node collectives (AllReduce, AllGather, etc.) across PCIe, xGMI, and RDMA networks within the ROCm stack.
AMD is hiring an MTS Silicon Design Engineer in Austin, TX to design, verify, and document ASIC/microprocessor silicon — spanning architecture and logic design, simulation, synthesis, place-and-route, and timing/power evaluation. Core technologies: SystemVerilog/UVM, Verilog simulation, C/C++, and x86 assembly and microarchitecture.
Senior (SMTS) software development engineer at AMD in Austin, TX working on systems-level GPU software: designing and debugging drivers, compilers, and tools, joining ASIC and hardware bring-ups, and optimizing 3D, compute, ray-tracing, and machine learning pipelines using C/C++/Python and APIs like OpenCL, OpenGL, DirectX, Vulkan, and CUDA.
AMD (via its Xilinx subsidiary) is hiring an MTS Silicon Design Engineer in San Jose to research, design, and verify ASICs — from architecture and logic design through simulation, synthesis, place-and-route, and timing/power analysis — using RTL, Verilog/VHDL, SystemVerilog/UVM, EDA/CAD tools, and C/C++, TCL, Perl, Python, and Shell scripting.
AMD is hiring Sr. Software Development Engineers in Austin, TX to design, develop, troubleshoot, and debug systems-level software and C models supporting CPU/GPU products on Unix/Linux, using development tools like GitHub and modern concurrent programming. Requires a Master's degree in ECE/CS and 1 year of related experience.
AMD (Xilinx subsidiary) is hiring Test Engineers in San Jose to develop ATE test programs and data infrastructure for next-gen FPGAs — analyzing volume test data for yield and test-time issues, building dashboards and pipelines, and working on Advantest, Verigy, and Teradyne platforms using Python, C/C++, Ruby, and Verilog/VHDL.
Principal-level software engineer at AMD building and maintaining CI/CD pipelines and platforms (Buildkite, GitHub Actions, Jenkins) for chip development, leading individual contributors, and modernizing developer workflows across component teams. Requires deep C/C++/Perl/Python, Unix/Linux internals, and cloud (AWS/Azure/GCP) experience.