American multinational semiconductor company
AMD is hiring an MTS Silicon Design Engineer in Boxborough, MA to research, design, verify, and document ASIC/SoC silicon — from architecture and logic design through simulation, synthesis, place-and-route, and SoC tape-out to first boot. Core technologies: UVM, SystemVerilog, SystemC/TLM, RTL debugging, Linux/Windows.
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AMD is hiring a PMTS Software Development Engineer in San Jose to validate AI solutions for distributed training and inference on ROCm, build cluster-scale automation, and participate in ASIC and hardware bring-ups. Work centers on low-level systems software: firmware, device drivers, kernel modules, and cloud-scale distributed systems.
AMD (via its Xilinx subsidiary) is hiring an MTS Silicon Design Engineer in San Jose to research, design, and verify ASICs — from architecture and logic design through simulation, synthesis, place-and-route, and timing/power analysis — using RTL, Verilog/VHDL, SystemVerilog/UVM, EDA/CAD tools, and C/C++, TCL, Perl, Python, and Shell scripting.
AMD is hiring Sr. Software Development Engineers in Austin, TX to design, develop, troubleshoot, and debug systems-level software and C models supporting CPU/GPU products on Unix/Linux, using development tools like GitHub and modern concurrent programming. Requires a Master's degree in ECE/CS and 1 year of related experience.
AMD (via its Xilinx subsidiary) is hiring an MTS Systems Engineer in Austin, TX to research, design, develop, and test electronic components and systems for semiconductor products — defining system specs and interfaces, resolving design weaknesses, and evaluating design-through-silicon flows. Core skills: Linux administration, infrastructure reliability, performance optimization, and incident resp
AMD (Xilinx subsidiary) is hiring Test Engineers in San Jose to develop ATE test programs and data infrastructure for next-gen FPGAs — analyzing volume test data for yield and test-time issues, building dashboards and pipelines, and working on Advantest, Verigy, and Teradyne platforms using Python, C/C++, Ruby, and Verilog/VHDL.
Principal-level software engineer at AMD building and maintaining CI/CD pipelines and platforms (Buildkite, GitHub Actions, Jenkins) for chip development, leading individual contributors, and modernizing developer workflows across component teams. Requires deep C/C++/Perl/Python, Unix/Linux internals, and cloud (AWS/Azure/GCP) experience.
MTS Software Development Engineer at AMD researches, designs, develops, and tests operating-systems-level software, compilers, and tools supporting semiconductor products. Day-to-day work spans kernel/systems development, GPU code optimization, and debugging in C/C++ or Python, plus deep learning frameworks like ONNX, PyTorch, and TensorFlow.
An engineering intern at AMD in Cork will design and verify high-speed SerDes and analog/mixed-signal circuits for next-gen CPUs, GPUs, and FPGAs using Verilog, Python, and industry tools.
Lead/senior FPGA systems design engineer at AMD in Hyderabad: design FPGA-based hardware systems, do RTL coding and system-level simulation, develop applications over HDMI, MIPI, PCIe, Ethernet and SDI, implement optimized algorithms via HLS, and research deep-learning algorithms (CNN, LSTM) on UltraScale+ MPSoC and Versal platforms.
A senior Signal & Power Integrity Engineer on AMD's board design team works on AI server products: designing server PCB stack-ups, running SI/PI simulation and analysis (Ansys SIwave/HFSS, Cadence PowerDC/PowerSI, Keysight ADS, HSpice), creating layout guidelines, and debugging electrical violations with cross-functional teams in Taipei.
Security engineer in AMD's Product Security Office implementing and validating platform security for AI systems across hardware, firmware, and software — running security assessments, driving vulnerability fixes, provisioning keys/certificates for secure boot and attestation, and building security tooling. Based in San Diego, CA; needs C/C++, Python, Linux, and deep platform-security experience.