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Architect Labs

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3 jobs
Architect Labs
22 views 3 months ago

Microarchitect / RTL Design - Memory Subsystem

Open 74d On-siteNorth AmericaPrincipal
United States

Design and implement memory controllers, hierarchies, and near-memory accelerators for AI-driven ASICs, optimizing bandwidth, latency, and power for ML workloads using SystemVerilog and AI-assisted flows.

AI Automation FPGA Machine Learning Prototyping +4 skills
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Architect Labs
18 views 3 months ago

Microarchitect / RTL Design - Interconnect & Fabric

Open 74d On-siteNorth AmericaPrincipal
United States

Design and own the on-chip interconnect fabric and high-speed I/O subsystems for AI-driven ASICs, implementing AMBA-compliant NoC routers, crossbars, and bridges to ensure low-latency, high-bandwidth data movement in production silicon.

AI Automation Backbone.js FPGA HPC +8 skills
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Architect Labs
9 views 3 months ago

Member of Technical Staff - Microarchitectural Validation

Open 129d On-siteAPAC, North America

Leads hardware verification for AI-generated chip designs, ensuring rigorous validation of custom ASICs at tapeout stage using SystemVerilog, UVM, and Python, while collaborating with AI/ML and architecture teams to refine verification strategies and methodologies.

AI Automation C++ FPGA Machine Learning +6 skills
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