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Responsibilities • Lead RTL design and implementation for AI chip SoC and subsystems. • Own key modules such as AI accelerator control logic, DMA, NoC/interconnect, memory subsystem, die-to-die/chip-to-chip interfaces,…
Responsibility Responsible for high-performance block implementation (RTL to GDSII). Perform block level floor planning, power grid implementation, APR placement, timing optimisation, CTS and routing. Close the design…
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