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資深數位IC設計工程師[USB/PCIe/PD][新店]
APACSenior
Taiwan
Xindian District, New Taipei City負責 USB/PCIe/PD 等高速介面相關產品設計 工作內容: 1. RTL design & verification 2. ASIC & FPGA implementation 3. Customer support and debug 職務條件:(Must) 熟悉硬體設計與 Verilog 語言 加分條件:(Plus) 1. 具備 USB/PCIe/PD 設計與驗證經驗 2. 具備 ASIC 設計流程經驗…
FPGA PCIe Rtl Verilog
1 views last week
數位IC設計(DisplayPort) 技術經理/技術副理/資深工程師
APACSenior
Taiwan
Xindian District, New Taipei City負責DisplayPort產品設計 DisplayPort digital circuit design and verification 工作內容: 1. IC architecture definition 2. Collaborate with analog and system engineers 3. RTL design & verification 4. ASIC & FPGA implementation 5.…
FPGA PCIe Rtl
1 views 2 weeks ago
數位IC設計資深工程師[PCIe/USB/SD][新店]
APACSenior
Taiwan
Xindian District, New Taipei City負責 USB/PCIe/SD 等高速介面相關產品設計 工作內容: 1. IC architecture definition 2. Collaborate with analog and system engineers 3. RTL design & verification 4. ASIC & FPGA implementation 5. Customer support and debug 職務條件: (Must) 1.…
FPGA PCIe Rtl