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Designs and validates chip-level test structures (JTAG, MBIST, scan/ATPG) to ensure silicon quality and manufacturability, collaborating with design and verification teams.
Onsite role protecting classified programs by managing industrial security compliance, safeguarding facilities, and supporting national security initiatives at Intel Federal.
Develop and maintain diagnostic tools for Intel Server products, debug performance issues, and validate software across platforms in a 2-year contract role.
Architects and implements pre-silicon verification strategies using UVM or formal methods, builds testbenches, and integrates block-level tests into chip-level environments for Intel hardware designs.
Validates mixed-signal hardware designs before fabrication, using SystemVerilog and UVM to ensure performance, power, and area goals are met.
Job Details: Job Description: Join Intel and build a better tomorrow. Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of…
Designs and implements secure, high-performance IP blocks for Intel’s Unified Chassis, focusing on AXI/APB bridges, ECC/parity schemes, and RAS/debug telemetry for SoC reliability.
Analyzes semiconductor manufacturing data using SQL, Python, and statistics to improve yield and quality in a high-volume production environment.
Integrate hardware security IP (RoT, crypto engines, HSMs) into AI-focused SoCs, define secure boot/attestation, and architect protections against physical/side-channel attacks for data-center hardware.
Develops topology-aware collective algorithms and transport layers for AI hardware, optimizing multi-node performance and co-designing with hardware teams.
Verifies CPU logic before manufacturing by writing test benches in SystemVerilog/UVM, running simulations, debugging failures, and collaborating with architects to meet specs.
CPU Core Logic Designer Location: US, California, Folsom Time Type: Full time Job Description Job Details: Job Description: Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU…
Sr. Machine Learning Engineer Location: US, California, Santa Clara, US, Oregon, Hillsboro, US, California, Folsom, US, Arizona, Phoenix Time Type: Full time Job Description Job Details: Job Description: Job…
Sr. AI Software Engineer - Agent Harness Location: US, California, Santa Clara, US, Oregon, Hillsboro, US, California, Folsom, US, Arizona, Phoenix Time Type: Full time Job Description Job Details: Job Description: Our…
Mixed Signal Logic Design Engineer Location: India, Bangalore Time Type: Full time Job Description Job Details: Job Description: The Memory PHY Group (MPG) within the Central Engineering Group (CEG) is looking for an…
Protect Intel’s systems by running offensive/defensive security ops, patching vulnerabilities, and automating security controls in a DevOps team that also builds AI agents to detect and respond to attacks.
Job Details: Job Description: The Role and Impact As a Sales Operations Global Process Owner, you will play a pivotal role in driving the success of Intel's projects and programs by providing analytical expertise…
Sell and architect Intel-based solutions for enterprise customers, advising on Edge, AI, and data-center tech while driving adoption across Oil & Gas, FSI, Retail, and Manufacturing.
Leads architecture and design of next-gen high-speed IO PHYs and SerDes circuits in advanced process nodes, optimizing performance, power, and area while mentoring technical leaders.
Designs and models next-gen CPU architectures for servers and edge devices, optimizing performance, power, and area while collaborating with cross-functional teams.
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