Analog/RF IC Mask Design(igh-speed SerDes circuit and layout)

Fully custom layout design for analog high-speed SerDes circuit and layout automation flow development.

#LI-DC3

• Bachelor's or Master's in a closely related field, e.g., EE, CE, CS, etc.
• Minimum 3 years relevant industrial experience in analog/RF or 3D-IC silicon interposer layout
• Proficient in fully custom layout design & layout verification for analog/RF circuit layout
• Proficient in layout implementation & verification tools, such as, Virtuoso, Calibre, Laker, Custom Compiler, etc.
• Experience in advanced FinFET process nodes
• Programming skills to automate routines by using Python, Perl, Shell scripts, etc. is a plus
• Experience in Auto Place & Route is a plus
• A strong team player able to work with others as well as working independently
• Good communication skill in English to work with global teams