Y Combinator ASIC Engineer, Power Management Design Verification
Summary
Lead verification of custom silicon powering Meta's data center infrastructure, designing UVM-based environments and ensuring first-pass silicon success for AI/ML, networking, and storage ASICs.
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon powering Meta's data center infrastructure. In this role, you will architect and drive end-to-end verification of complex IP blocks and SoCs designed for AI/ML acceleration, networking, and storage workloads. You will define scalable UVM-based verification environments, establish coverage closure methodologies, and partner with design, emulation, and post-silicon validation teams to ensure first-pass silicon success across Meta's infrastructure ASIC portfolio.