ASIC/FPGA Verification Engineer
Summary
Design and implement ASIC/FPGA verification environments using UVM and SystemVerilog, building self-checking test benches with OOP principles and coverage analysis.
Job Description Job Description Position Responsibilities: • Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog. • Develop self-checking and reusable test benches from the ground up, employing Object-Oriented Programming principles such as Inheritance and Polymorphism, while utilizing UVM to build drivers, monitors, predictors, and scoreboards. • Create Functional Coverage Models and conduct Code Coverage analysis to ensure thorough verification of designs…