BE CAD Physical Impl and AI Engineer
Summary
Designs and optimizes chip-implementation flows using Synopsys/Cadence tools, integrates AI for design closure, and builds reusable CAD frameworks for physical design teams.
- Collaborate with EDA vendors for methodology improvements and tool debugging
- Define reusable automation and methodology frameworks
- Develop and optimize synthesis place and route and timing closure methodologies
- Evaluate and deploy next generation EDA capabilities across Synopsys and Cadence tools
- Improve QoR runtime scalability and engineering productivity
- Integrate AI for design optimization exploration closure and debug
- Lead development of FlowJam back end CAD flow framework
- Mentor engineers and drive technical excellence culture
- Optimize power optimization and signoff workflows
- Partner with physical design teams for implementation methodology
Perks/Benefits:
- 401k match
- Dental plan
- Educational assistance
- Health benefits
- Hybrid work
- Maternity leave
- On-site work
- Paid time off
- Parental leave
- Recognition programs
- Vacation days