CPU circuit robustness management engineer

1. Involve in CPU IP pre-silicon circuit design weakness review
2. Develop CPU IP circuit robustness post-silicon test item to screen circuit weakness
3. Develop CPU PI and power MP quality methodology

Requirements

1. Background of digital circuit design
2. Knowledge of analog circuit design
3. Familiar with EDA tool: SPICE, STA, PTPX
4. PDN knowledge is a plus
Education: Master's Degree