<Data center>Die-to-Die High Speed Analog Circuit and HBM/DDRPHY Design Engineer

• Chip to Chip interface analog PHY Circuit such as UCIe standard or customized Die to Die link analog circuit design
• HBM/DDR/LPDDR analog PHY Circuit Design and Mixed-Mode/High-Speed Circuit Design, etc.

#LI-DC3

1. MS or above with major in EE
2. Familiar with UCIe/C2C/D2D/HBM/DDR/LPDDR/Serdes analog PHY circuit design.
3. At least 2 years work experiment on Mixed-Mode/High-Speed Circuit Design
4. Excellent working attitude and good interpersonal and communication skills.
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