<Data center>SIPI engineer/senior engineer
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Description
1. High speed SERDES SIPI analysis and sign-off
2. Core power integrity analysis
Requirements
1. Understanding signal integrity and power integrity methodology
2. Be capable of >30Gbps SERDES experience such as PCIe gen6, USB 4.0, or 56G/112G Ethernet SERDES
3. Be familiar with tools such as Sigrity, ADS, H-spice
Education: Master's Degree