Design Enablement & Tapeout Operations
Summary
Supervise the full tapeout process—from customer engagement and DRC review to GDS/jobview release—while supporting PDK development with EPDA vendors like Cadence, Siemens-Mentor, Ansys-Lumerical, and Luceda in a silicon photonics foundry environment.
Role and Responsibilities
- Supervise tapeout process from customer engagement to final jobview release.
- Resolve customer queries during their design process.
- Oversee DRC review, waiver & approval, GDS preparation & floorplanning for tapeout.
- Co-ordinate tapeout logistics with foundry TD, customer engineering.
- Oversee jobview and MEBES approval / release for tapeout.
- Verify component performance against design target.
- Si photonics design to enhance PDK elements for Design for Manufacturing (DFM).
- Support PDK development with Designer and Electronics Photonics Design Automation (EPDA) vendors like Ansys-Lumerical, Siemens-Mentor, Cadence or Luceda.
- Maintain & upgrade PDK to enhance competitiveness.
- Support CompoundTek Technology roadmap with design services
Qualifications and Education Requirements
- PhD/Master/Degree in Microelectronics/Electrical/Electronic Engineering/Physics/Material Science.
- At least 5 years relevant experience in Design Enablement and / or Tapeout Operations working with foundry customers.
- Si photonics knowledge preferred but not mandatory.
- Good interpersonal, effective presentation and communication skills.
Additional Attributes
- Exhibit Initiative, ownership, accountability and a team player.
- Able to perform under a fast paced and challenging environment.
- Demonstrate strong problem-solving skills.