DFT (Design for Test) Engineer
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Summary
ASD GLOBAL is hiring a DFT (Design for Test) Engineer in Santa Clara, CA to build and validate test structures for SoC/ASIC chip designs. Day-to-day work centers on scan-based DFT, ATPG pattern generation and debug, MBIST memory testing, and IO test methodologies, requiring about 5 years of hands-on experience.
Job Description Job Description Job title: DFT Engineer Location: Santa Clara, California • 5 years of hands-on experience in DFT and ATPG for SoC or ASIC designs • Strong understanding of DFT fundamentals including controllability, observability, and scan-based testing • Proven expertise in ATPG pattern generation, analysis, and debug • Experience with MBIST, including memory test architectures and diagnostics • Knowledge of IO Test methodologies for interface and pin level validation • Solid …