DV Engineers (Ethernet)

Roles and Responsibilities :

• Design, develop, test, and verify Ethernet-based IP blocks using System Verilog and UVM methodologies.
• Collaborate with cross-functional teams to integrate ASIC designs into larger systems.
• Develop and maintain reusable verification components (e.g., functions) for efficient testing of complex digital circuits.
• Troubleshoot issues related to Ethernet protocol implementation in both software and hardware environments.

Job Requirements :

• 5-10 years of experience in design verification engineering with expertise in Ethernet protocols.
• Strong understanding of ARM processors, RISC architecture, and emulators such as QEMU or SPICE simulations.
• Proficiency in Python programming language for scripting automated tests and debugging tools like Wireshark or Tcpdump.