Edge AI 大廠｜Server Hardware Design Engineer (Server EE) | WLB

Oct 23, 2026 12 hr. ago

Cake Recruitment Consulting Edge AI 大廠｜Server Hardware Design Engineer (Server EE) | WLB

Own server system hardware design on Intel Xeon / AMD EPYC x86 platforms, covering schematic design and high-speed layout review.
Design PCIe Gen5/Gen6, DDR5, and SerDes routing, including stack-up and impedance control.
Design and verify power sequencing; lead platform bring-up and debug.
Co-develop with BMC/CPLD and BIOS/firmware teams, owning measurement, validation, and issue resolution.
Drive EVT/DVT/PVT design and validation for ODM hardware/system projects, and support mass-production (MP) maintenance.

Platforms: Intel Xeon, AMD EPYC, server/x86 architecture
High-Speed Design: PCIe Gen5/Gen6, DDR5, SerDes, stack-up & impedance control
EDA & Instruments: OrCAD, Allegro; high-bandwidth oscilloscope, logic/protocol analyzer
Sideband & Management: I2C/I3C, SMBus, eSPI/LPC, SPI, JTAG, SGPIO, LTPI; BMC, CPLD, BIOS/POST debug

Bachelor’s degree or above in Electronics/Electrical Engineering or a related field, with Server/x86 system hardware design experience.
Proficient in OrCAD/Allegro for schematic design and high-speed layout.
Familiar with Intel/AMD platform design guides (EDS/PDG) and DDR/PCIe routing rules for schematic/layout review.
Hands-on with high-bandwidth oscilloscopes and logic/protocol analyzers, and with sideband interfaces (I2C/I3C, SMBus, eSPI, SPI, JTAG, etc.).
Solid understanding of server architecture, with BIOS/POST debug and BMC console skills; OpenBMC/AMI, CPLD, Linux, and OCP standards (DC-MHS/DC-SCM, OCP NIC 3.0) a plus.

Skills