FPGA Engineer

Responsibilities Algorithm implementation: Translate complex probabilistic algorithms from high-level models, such as pseudocode/Python/C++/MATLAB, into highly pipelined, resource-efficient FPGA RTL. RTL design from scratch: Design and implement custom digital logic using VHDL where off-the-shelf vendor IPs are insufficient, bottlenecked, or introduce latency. High-speed I/O integration: architect data acquisition pipelines interfacing with the analogue front end via ultra-fast ADCs and high-sp…