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FPGA Engineer

Summary

Design FPGA/ASIC solutions for ultra-low-latency trading systems, from architecture to live hardware bring-up, using SystemVerilog/Verilog and vendor tools.

You will work on FPGA and ASIC solutions for ultra-low-latency trading systems across the full design lifecycle, including architecture, RTL implementation, simulation, verification, and bring-up on live hardware. You will solve real engineering problems with guidance from experienced engineers and senior mentors.

Responsibilities

  • Design FPGA and ASIC solutions
  • Develop architectures and RTL implementations
  • Perform simulation and verification
  • Bring up designs on live hardware
  • Solve real engineering problems in low-latency trading systems

Requirements

  • Academic background in Electrical or Computer Engineering
  • Experience with SystemVerilog or Verilog
  • Experience with FPGA vendor tools such as Vivado or Quartus
  • Programming experience in Python, C++, or a similar language
  • Interest in FPGA and ASIC applications in low-latency trading systems
  • Strong problem-solving skills
  • Strong communication skills
  • Graduating in 2028

Benefits

  • Daily catered lunches
  • Fully stocked kitchen
  • On-site gym
  • Workout classes
  • Games room
  • Social events
  • Laundry service

See also

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