G260077-Chip Application Front-End Technical Manager

Job Description & Requirement

1. Perform physical synthesis from RTL or gate-to-gate optimization
2. Take responsibility for netlist, SDC and design quality check with customer
3. Chip I/O arrangement and verification with in-house tool
4. Perform low power structure verification (UPF/CPF)
5. Perform power replay and power analysis
6. Review/check implementation quality in each design stage
7. Cooperate with P&R in timing analysis
8. Planning chip level STA (e.g. flatten, HyperScale) strategy and machine arrangement for big design
9. Perform MMMC timing closure and signoff check
10. Schedule and team resource management
11. Manage project milestone to tape out chip on time
12. Consolidate project status/progress to customer
13. Collaborate outsourcing engineering team to execute project smoothly
14. 8 years+ exp, have experiences in 16/7/5nm IC design experiences will be plus