Hardware Engineer, High Speed Digital Engineer
Summary
The High Speed Digital Design Engineer will own the design, simulation, and validation of high-speed interfaces like DDR, Ethernet, and SerDes for Amazon's LEO satellite customer terminals. The role involves component selection, schematic capture, signal integrity analysis, and lab testing to ensure robust performance for high-volume manufacturing.
Amazon LEO is an initiative to increase global broadband access through a constellation of 3,236 satellites in low Earth orbit (LEO). Its mission is to bring fast, affordable broadband to unserved and underserved communities around the world. Amazon LEO will help close the digital divide by delivering fast, affordable broadband to a wide range of customers, including consumers, businesses, government agencies, and other organizations operating in places without reliable connectivity.
As a High Speed Digital Design Engineer on the Customer Terminal team, you will own high-speed digital interfaces — DDR, Ethernet, and SerDes — for next-generation terminal products. You'll drive component selection, schematic design, signal integrity simulation, and lab validation, collaborating across hardware, silicon, and systems teams to deliver robust, cost-optimized designs ready for high-volume manufacturing.
Export Control Requirement:
Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
Key job responsibilities
- Select and qualify high-speed interface components (connectors, retimers, PHYs, ESD protection) balancing performance, cost, availability, and manufacturability
- Own schematic capture for high-speed digital subsystems — define net topologies, termination schemes, and interface pin assignments in collaboration with PCB layout engineers
- Own signal integrity analysis for high-speed interfaces (DDR, PCIe, Ethernet, USB, MIPI) from architecture through production, including simulation, design rule development, lab validation, and correlation
- Perform channel modeling and simulation using EM tools (ANSYS HFSS/SIwave, Keysight ADS, Cadence Sigrity, Hyperlynx) to verify interconnect performance meets silicon requirements
- Participate in schematic and layout design reviews, providing signal and power integrity feedback to ensure designs meet performance and cost targets
- Validate high-speed interfaces in the lab using oscilloscopes, VNAs, TDRs, and high-fidelity probing techniques. Correlate measurements back to simulation models
- Collaborate with silicon, RF, antenna, thermal, mechanical, power, and systems teams to close budgets and solve problems within real-world product constraints
- Support board bring-up, debug, and root-cause analysis of SI/PI-related failures
- Support designs through qualification, production ramp, and high-volume manufacturing
As a High Speed Digital Design Engineer on the Customer Terminal team, you will own high-speed digital interfaces — DDR, Ethernet, and SerDes — for next-generation terminal products. You'll drive component selection, schematic design, signal integrity simulation, and lab validation, collaborating across hardware, silicon, and systems teams to deliver robust, cost-optimized designs ready for high-volume manufacturing.
Export Control Requirement:
Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
Key job responsibilities
- Select and qualify high-speed interface components (connectors, retimers, PHYs, ESD protection) balancing performance, cost, availability, and manufacturability
- Own schematic capture for high-speed digital subsystems — define net topologies, termination schemes, and interface pin assignments in collaboration with PCB layout engineers
- Own signal integrity analysis for high-speed interfaces (DDR, PCIe, Ethernet, USB, MIPI) from architecture through production, including simulation, design rule development, lab validation, and correlation
- Perform channel modeling and simulation using EM tools (ANSYS HFSS/SIwave, Keysight ADS, Cadence Sigrity, Hyperlynx) to verify interconnect performance meets silicon requirements
- Participate in schematic and layout design reviews, providing signal and power integrity feedback to ensure designs meet performance and cost targets
- Validate high-speed interfaces in the lab using oscilloscopes, VNAs, TDRs, and high-fidelity probing techniques. Correlate measurements back to simulation models
- Collaborate with silicon, RF, antenna, thermal, mechanical, power, and systems teams to close budgets and solve problems within real-world product constraints
- Support board bring-up, debug, and root-cause analysis of SI/PI-related failures
- Support designs through qualification, production ramp, and high-volume manufacturing
