IC design工程師(台北或新竹) | FC02015131
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Description
類比IC電路設計
1. build up verilog testbench
2. fullchip verilog simulation/verification
3. verilog behavior models creation
4. pattern pool coverage raising up
類比IC電路設計
1. build up verilog testbench
2. fullchip verilog simulation/verification
3. verilog behavior models creation
4. pattern pool coverage raising up