IC Senior/ Staff Physical Design Engineer (IC Backend)
Summary
Senior/Staff Physical Design Engineer leading backend chip development from netlist to GDSII, including floorplanning, P&R, STA, and tapeout prep.
Key Responsibilities
Collaborate on chip floorplanning, clock architecture, and power planning.
Own the full physical design flow: P&R, STA, formal and physical verification, power and reliability analysis, and tapeout preparation.
Requirements
Bachelor's or higher in Electronics, Microelectronics, or Computer Science.
5–7 years experience for Senior level; 7–9 years for Staff level, with real project execution.
Proficiency in TCL, Perl, or Python; EDA tool development experience is a plus.
Strong communication, initiative, and self-drive.