IC佈局工程師/資深工程師
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Description
1.IC fully layout
2.類比 IC Layout 經驗者佳或具APR經驗者。
3.具Tape out 量產經驗，能獨立處理Whole Chip者優先考慮
4.熟悉layout tool或verification tool等工具軟體的使用
5.懂 Latch-up/ESD/Cross-section 者優先考慮
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