IP DFT Engineer

We are seeking a skilled and motivated Mixed-Signal IP DFT Engineer to join our design team. In this role, you will be responsible for developing and implementing Design for Test (DFT) strategies for mixed-signal IP blocks, ensuring high test coverage and manufacturability. You will work closely with analog, digital, and verification engineers to deliver robust and testable mixed-signal IP solutions.

Key Responsibilities:

• Develop and implement DFT architectures and methodologies for mixed-signal IP blocks, including scan insertion and test point insertion for digital portions, and test enablement for analog circuits.
• Collaborate with analog and digital design teams to ensure DFT requirements are incorporated during IP development.
• Perform DFT verification, including ATPG (Automatic Test Pattern Generation), fault simulation, and coverage analysis for digital logic.
• Work with Integration DFT teams to integrate IP-level DFT features into larger systems.
• Document DFT design, verification, and test procedures for mixed-signal IPs.
• Stay current with industry trends and best practices in mixed-signal DFT and testability.