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安科諾科技有限公司

Layout Engineer 佈局工程師 (新店)

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Description

1. 採用CMOS、SOI技術或是III-V GaAs製程進行混合訊號、類比電路和RF射頻電路的電路佈局。
2. 溝通能力佳,能與電路設計工程師一起進行晶片布局檢視和分析。
3. 能配合不同電路設計團隊規劃及安排工作時程,必要時針對佈局工作做出相關的權衡。
4. 解釋LVS、DRC和ERC報告,並和電路設計工程師討論完成佈局的最佳方法。

  • Designing complex layout for mixed signal, analog and RF circuits in deep sub-micron CMOS technologies and / or III-V processes.
  • Reviewing and analyzing floorplans and complex circuits with circuit design engineers.
  • Working with circuit design team to plan/schedule work and negotiate any necessary layout tradeoffs as needed.
  • Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout.
  • Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements.

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