Memory Core Design Engineering Intern
Summary
A six-month internship at Solidigm in Rancho Cordova, CA, where the intern designs analog, semi-custom, and mixed-signal circuits for 3D NAND flash memory cores — memory cell arrays, sense amplifiers, decoders, and word/bit line drivers — collaborating cross-functionally to improve power, performance, area, and reliability for AI infrastructure.
This is a high-autonomy, high-ownership internship. You will work directly alongside engineers and scientists to build world’s only floating gate memory technology that has immediate, tangible impact on AI infrastructure. Some days you're heads-down designing circuits all day. Other days you're pairing with engineers across the company to understand and develop a new feature our customers’ demand. We are looking for a versatile hardware engineer who is interested in architecting and implementing elegant memory design solutions and thrive with the autonomy to propose creative approaches to problems.
As an intern, you will work on innovative circuits (analog, semi-custom and mixed-signal design) for 3DNAND flash memory core. Collaborate with cross-functional teams to improve the power, performance, area and reliability by detailed transistor-level analysis.
Drive architecture, design and physical implementation of memory core circuits involving memory cell arrays, sense amplifiers, decoders and word line / bit line drivers.
Responsibilities may be quite diverse of a technical nature. U.S. experience and education requirements will vary significantly depending on the unique needs of the job.
Job assignments are usually for the summer for a duration of six months.
Candidate must be a graduate student pursuing either Masters or Ph.D. degree in Electrical / Electronic Engineering. Candidate must be in good academic standing.
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