【內湖】Cloud Hardware Design Engineer, Senior (3091967)

【Talents who apply job through Qualcomm Career Website will be reviewed and considered as top priority】

Please apply directly on Qualcomm Career Site via link below, and attach your English resume for further review. Thank you!

https://qualcomm.wd12.myworkdayjobs.com/zh-CN/External/job/Taipei-TWN/HW-Design-Engineer--Senior_3091967

【Responsibilities】

• Participate in schematics design, PCB layouts, design reviews, component selections, mechanical and thermal designs, and develop test plans.
• Assist in the development of functional specifications for systems, cards, sub-systems, and rack-level architectures.
• Collaborate with internal teams and ODMs to develop and support customer-specific hardware and system requirements.
• Facilitate consensus on technical trade-offs at hardware, software, and chip design levels.
• Support architecture and card designs including accelerator SoCs, memory, I/O, power delivery, electrical/mechanical integration, and PCB definition/design.
• Participate in the design and development of rack-level inference solutions, ensuring alignment with customer requirements and system-level performance goals.
• Assist in the bring-up and debugging of hardware systems, cards, and rack-level configurations.
• Support factory and manufacturing processes, ensuring quality and consistency across rack-level deployments.
• Travel to development and customer sites as needed to support rack-level solution deployment and validation.

【REQUIRED EXPERIENCE】
Minimum 5+ years in system/card/rack-level development

Rack-Level Experience:

• Familiar with rack-level system integration, including chassis, backplane, cabling, airflow, and thermal management across multiple cards/modules.
• Familiarity with rack-scale power delivery, including PDUs, VRMs, PMICs, and power budgeting across multiple boards.
• Experience with rack-level diagnostics and bring-up, including debug of interconnects, signal integrity across long traces/cables, and system-level validation.
• Understanding of rack-level mechanical constraints, EMI shielding, and compliance with data center deployment standards.
• Collaboration with ODMs/OEMs on rack-level design and manufacturing, including review of mechanical drawings, thermal simulations, and compliance testing.

Board-Level Design:

• Knowledge of PCIe cards, motherboards, daughtercards, and backplane signal and power delivery.

Component Qualification:

• Experience qualifying PMICs, voltage regulators (VRs), clock buffers, flash memory, and connectors for use in complex cards.

Design & Validation:

• Experience in dense, high-layer count PCB designs (8–20+ layers).
• Familiarity with JTAG tools for bring-up and debug.

High-Speed Interfaces:

• Knowledge of high-speed serial I/O (6–10+ Gbps), PCIe Gen5/6, LPDDR4x/5x, DDR4/5, 200/400/800 GbE.
• Experience with long PCB/cable topologies (0.35–1.5 meter), signal integrity, and compliance with current standards.
• Ability to debug at packet/protocol level across link, transport, transaction, and command layers.

Memory & Clocking:

• Experience with LPDDR4x memory technologies, DIMM layout and validation.
• Familiar with clock distribution, power distribution, SMBus, PMBus, SPI, PWM/Tach, and BMC integration.

Tools & Collaboration:

• Ability to drive schematic capture and PCB layout tools (Cadence Allegro, Mentor Expedition).
• Ability to use lab equipment: oscilloscopes, logic analyzers, JTAG, SMBus, serial debuggers.

Firmware & Software:

• Good understanding of x86 FW/SW stack and firmware architecture.
• Experience with BMC hardware/software integration and management.

Compliance & Testing:

• Familiarity with regulatory, environmental, and compliance testing for rack-level systems.

Networking and switch:

• Familiarity with PCIE switch design/debug and test process
• Familiarity with networking topology
• Experience in Ethernet Switch hardware