Non-Volatile Memory (NVM) Architect

We are seeking an experienced Non-Volatile Memory (NVM) Architect to lead the definition, architecture, and development of next-generation embedded memory IP solutions for automotive, industrial, AI, and mixed-signal SoCs. The ideal candidate will possess deep expertise in EEPROM, ReRAM, or Embedded Flash technologies and have a proven track record of delivering silicon-proven memory architectures from concept through production.

This role requires strong technical leadership across device technology, memory architecture, circuit design, compiler development, reliability, and product integration while working closely with process development, analog, digital, verification, layout, product engineering, and system architects.

• Define the architecture of embedded NVM IP including EEPROM, ReRAM, and embedded Flash.
• Develop memory architecture specifications covering:
  • Array organization
  • Peripheral architecture
  • High-voltage generation
  • Read/write algorithms
  • Program/erase operations
  • ECC implementation
  • Redundancy
  • Built-In Self Test (BIST)
  • DFT architecture
  • Security features
• Collaborate with process integration teams to optimize memory bitcells and process options.
• Define memory compiler requirements supporting multiple capacities, word widths, redundancy options, and customer configurability.
• Lead architecture reviews and technical decision making across cross-functional teams.
• Develop product roadmaps for next-generation embedded NVM technologies.
• Drive silicon bring-up, characterization, failure analysis, and design improvements.
• Support customer engagements on architecture, reliability, qualification, and technology capabilities.
• Mentor junior architects and design engineers.

• B.S., M.S. or Ph.D. in Electrical Engineering or related field.
• 15-18+ years of semiconductor memory design experience.
• Deep expertise in one or more of:
  • Embedded EEPROM
  • Embedded Flash
  • ReRAM
• Strong understanding of:
  • Memory bitcell operation
  • Sense amplifiers
  • Write drivers
  • Charge pumps
  • High-voltage circuits
  • Reference generation
  • Timing architecture
• Experience with automotive-grade memory development.
• Experience defining memory compiler architecture.
• Knowledge of semiconductor reliability including:
  • Endurance
  • Retention
  • Read disturb
  • Write disturb
  • Cycling degradation
  • HTOL
  • Electromigration
  • Data retention qualification
  • Experience bringing multiple memory products to production