PCB Layout Expert – Automotive HPC Embedded Platforms

Job Description

Lead PCB layout for automotive HPC and chiplet platforms, delivering manufacturable designs with design teams and external suppliers. Improve efficiency through AI-enabled automation, process and library management, and team mentoring.

Key Responsibilities:

• Own multilayer/HDI placement, fine-pitch BGA escape, and routing from approved schematics and mechanical constraints through release.
• Route DDR/LPDDR, PCIe, Ethernet, and SerDes to SI/PI constraints; implement power/ground, decoupling, and thermal/EMC requirements.
• Coordinate design, SI/PI, mechanical, manufacturing teams, and external PCB suppliers on stack-ups, materials, vias, cost, reliability, and manufacturability.
• Manage footprints, pad stacks, and ECAD libraries; improve request, naming, validation, approval, versioning, traceability, reuse, and obsolescence processes.
• Lead layout/DRC and DFM/DFA/DFT reviews, resolve supplier issues, and release Gerber/ODB++, drill, stack-up, drawing, placement, and BOM data.
• Mentor layout engineers; maintain layout guidelines and checklists, and guide application notes and customer presentations explaining trade-offs and risks.
• Improve development handovers, reviews, change control, and release workflows using reusable practices, lessons learned, and supplier feedback.
• Apply AI-assisted tools and scripting to layout checks, library verification, and documentation; validate outputs, protect design data, and measure cycle-time, quality, and rework improvements.

Qualifications

• Bachelor’s degree in Electrical/Electronic Engineering or equivalent.
• 10+ years in complex high-speed PCB layout, with end-to-end ownership and design-team/supplier coordination; automotive experience preferred.
• Expertise in multilayer/HDI stack-ups, BGA escape, microvias, via-in-pad, fabrication capabilities, and reliability trade-offs.
• Strong DDR/LPDDR, PCIe, Ethernet, and SerDes routing skills: impedance, timing, differential pairs, crosstalk, return paths, and SI/PI.
• Proficient in Cadence Allegro, Altium Designer, or equivalent; experienced in constraint management, libraries, and revision-controlled releases.
• Knowledge of PCB fabrication/assembly, DFM/DFA/DFT, relevant IPC standards, and manufacturing deliverables.
• Experience improving development/library processes and applying scripting, ECAD automation interfaces, and AI tools with validated efficiency gains.
• Experience mentoring engineers and preparing layout guidelines, application notes, and customer technical presentations.

Soft skills

• Results-oriented, structured, and quality-driven; strong analysis, root-cause problem-solving, and independent ownership.
• Proactive collaboration across global teams and external suppliers.
• Clear English communication, technical writing, and customer presentation skills.

Further details regarding compensation and benefits will be shared during the interview process.