Physical Design Engineer

🚨 Hiring: Physical Design Engineer | Mountain View, CA

📍 Location: Mountain View, CA
🏢 Work Model: Hybrid
💼 Employment: Contract-to-Hire
🚀 Start: ASAP

We’re looking for someone with strong hands-on expertise in Physical Design, Place & Route (PnR), PPA optimization, timing convergence, and signoff for advanced technology nodes.

Key Responsibilities

Drive block-level physical design implementation from netlist to GDSII
Floorplanning, power planning, placement, CTS, routing & physical verification
Optimize designs for Power, Performance & Area (PPA) targets
Drive timing closure across multiple corners and modes
Analyze and resolve setup, hold, transition, capacitance & noise violations
Develop and maintain SDC timing constraints and STA signoff methodologies
Perform EMIR analysis and closure
Collaborate with RTL, DFT, STA and Signoff teams through successful tapeout
Debug complex physical-design issues and drive design convergence

Required Skills

Strong hands-on experience with:

Physical Design | PnR | Floorplanning | Placement | CTS | Routing | Timing Closure | STA | SDC | EMIR | PPA Optimization

Experience with industry-standard EDA tools, including:

Synopsys Fusion Compiler / ICC2 | PrimeTime | Cadence Innovus | RedHawk / Voltus

Experience with low-power design techniques and signoff methodologies is highly desirable.

Candidates with experience in 7nm / 5nm / 3nm advanced nodes are strongly preferred.

🎓 Bachelor's or Master's degree in Electrical/Electronics Engineering preferred.

Location: Remote - Mountain View, California, United States

Skills required for this job:

• Engineering