Post-Training Optimization Engineer (LLM Inference & Efficiency)

About Nava

Nava is a neocloud company purpose-built for the AI era. We design, deploy, and operate large-scale GPU infrastructure and deliver inference-as-a-service to teams building the next generation of AI products. Our platform runs on NVIDIA GPU systems, high-performance RDMA fabrics, and a fully automated, software-defined operations model. Every engineer at Nava works close to the metal, on infrastructure built to keep GPUs saturated and models serving.

Role & Responsibilities

• Optimize LLM inference pipelines for latency, throughput, and memory efficiency across GPU/TPU hardware—using quantization, pruning, kernel fusion, and runtime scheduling.
• Implement and benchmark model compression techniques (INT4/INT8/FP8, LoRA, Sparse attention) to reduce model size while preserving performance.
• Integrate and tune LLM serving frameworks (vLLM, TensorRT-LLM, HuggingFace TGI, ONNX Runtime) for high-throughput, low-latency inference in cloud and on-premise environments.
• Collaborate with ML researchers and infrastructure engineers to profile bottlenecks and implement hardware-aware optimizations using CUDA, Triton, or custom kernels.
• Design and automate model benchmarking suites to track performance regression, memory footprint, and cost-per-token across model versions and hardware targets.
• Document optimization playbooks and contribute to internal tooling for repeatable, scalable model deployment workflows.

Skills & Qualifications

Must-Have

• PyTorch
• TensorRT
• vLLM
• Quantization (INT4/INT8/FP8)
• CUDA
• ONNX Runtime
• Triton Inference Server
• LLM Inference Optimization

Preferred

• Experience with Mixture-of-Experts (MoE) models
• Familiarity with HuggingFace Transformers and TGI
• Knowledge of NPU/ASIC inference backends (e.g., Qualcomm, Groq, Cerebras)