Process Integration Manager 製程整合經理

Job Description
Key Responsibilities Technical Execution & PI Ownership
Lead day‑to‑day Process Integration execution for assigned DRAM modules within the Advanced Technology & Engineering (ATE) organization.
Own yield ramp, stability, and integration readiness for assigned scope during technology transfer, pilot, and early HVM phases.
Drive root cause investigations for top yield detractors using DOE, SPC/FDC, FMEA, 8D, and structured problem‑solving methodologies.
Ensure process window margin, manufacturability, and reliability requirements are met and sustained.
Champion adoption of Best‑Known Methods (BKM) and site‑to‑site learning to reduce variability and accelerate learning cycles.

Technology Transfer & Ramp Support
Execute DRAM technology transfer activities from TD or donor fabs to ID1 under guidance from M2/M3 leadership.
Support new product introduction (NPI), process qualification, and customer ramp readiness.
Coordinate inter‑fab learning reviews, gap assessments, and corrective action follow‑through.
Support extended international assignments (3+ months) for training and technology transfer as required.

People Leadership & Coaching
Manage and develop a team of Process Integration engineers (NCG and experienced).
Provide technical guidance, mentoring, and coaching on PI fundamentals, module ownership, and execution rigor.
Set clear priorities, expectations, and deliverables aligned with ramp milestones and fab needs.
Conduct regular performance feedback and development planning for direct reports.
Foster a culture of accountability, collaboration, safety, and continuous improvement.

Cross‑Functional Collaboration
Serve as a primary PI interface with Manufacturing, Equipment, Yield Engineering, Device, TD, Quality, and Design teams.
Drive alignment and rapid issue resolution across functions to protect yield, schedule, and quality.
Communicate status, risks, and mitigation plans clearly to peers and management.

Operational Excellence
Execute and sustain process control strategies to ensure stable operations during ramp.
Ensure compliance with internal quality, safety, and audit requirements.
Leverage data and analytics to drive fact‑based decisions and continuous improvement.
Support off‑shift or flexible schedules as required during critical ramp phases.

Responsibilities:

• Lead Process Integration execution and readiness for assigned DRAM modules during tech transfer and early HVM
• Drive root cause investigations and yield improvement using DOE, SPC/FDC, FMEA, 8D, and structured problem solving
• Ensure process margin, manufacturability, and reliability requirements are met and sustained
• Manage and develop a team of PI engineers, providing coaching, priorities, and technical guidance
• Partner across Manufacturing, Equipment, Yield, Device, TD, Quality, and Design to drive alignment and resolve issues quickly

Minimum Qualifications

• Bachelor's degree with a minimum 5 years of HVM or FAB experience where minimum 2 years as people leader directly & indirectly

-Minimum 3 years of experience in semiconductor fabrication areas such as yield ramp, reduction of cost, and quality improvement.
-Clear understanding of transistor operations, scaling limitations and reliability

• Basic knowledge of CMOS and characterization methods

Preferred Qualifications
-Master's or Ph.D. degree in Material science, Electrical, Electronics, Chemical or Engineering areas
-Experience with TD, Process Integration, Device, Yield analysis, QR
-Experience working with 300mm semiconductor environment.
-Solid knowledge of tech transfer and development
-Experience in SWR, process transfer, module ownership, ramp up, trend sustaining

Using Artificial Intelligence