Product Line Manager – Programmable Switches & AI DPU Acceleration
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Description
Key Responsibilities
- Product Strategy & Hardware Definition: Define the roadmap for fixed/programmable switching platforms.
- Accelerator Platform Execution: Own the hardware lifecycle for high-speed AI DPU PCIe add-in cards. Ensure hardware designs support key deployment topologies including Server DPU, AI backend NIC, bump-in-the-wire offload, and smart switch in-network computing.
- NPI Execution & Engineering Governance: Partner closely with hardware engineering (EE, thermal, mechanical, signal integrity), validation (DQA), and manufacturing teams through EVT, DVT, and PVT stages.
- Ecosystem & NOS Enablement: Coordinate with software and firmware teams to ensure seamless hardware abstraction support across both open-source ecosystems and bare-metal environments.
- Business Ownership & Customer Solution Mapping: Manage product pricing, gross margin targets, and volume forecasting. Interface directly with CSP, telco, and enterprise customers to deliver hardware platforms optimized for line-rate packet brokering, NAT/EIP gateways, physical-to-virtual (PV) VXLAN translation, and L4–L7 load balancing.